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| author | Wilco Dijkstra <wdijkstr@arm.com> | 2020-08-28 17:51:40 +0100 |
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| committer | Wilco Dijkstra <wdijkstr@arm.com> | 2020-08-28 17:51:40 +0100 |
| commit | bd394d131c10c9ec22c6424197b79410042eed99 (patch) | |
| tree | a50e1b4a3bd0a4cbc610c1f0ef7d7d8119f4ed6a /nis | |
| parent | 567b1705017a0876b1cf9661a20521ef1e4ddc54 (diff) | |
| download | glibc-bd394d131c10c9ec22c6424197b79410042eed99.tar.gz glibc-bd394d131c10c9ec22c6424197b79410042eed99.tar.xz glibc-bd394d131c10c9ec22c6424197b79410042eed99.zip | |
AArch64: Improve backwards memmove performance
On some microarchitectures performance of the backwards memmove improves if the stores use STR with decreasing addresses. So change the memmove loop in memcpy_advsimd.S to use 2x STR rather than STP. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Diffstat (limited to 'nis')
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