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| author | Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com> | 2017-10-25 13:13:53 -0200 |
|---|---|---|
| committer | Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com> | 2017-10-25 13:14:30 -0200 |
| commit | 63da5cd4a097d089033d980c42254c3356fa723f (patch) | |
| tree | 0c503790b1b430759f4d292a2a86e49b96531c47 /math/feenablxcpt.c | |
| parent | a122dbfb2e7f90b338b633a73b576efa258e215d (diff) | |
| download | glibc-63da5cd4a097d089033d980c42254c3356fa723f.tar.gz glibc-63da5cd4a097d089033d980c42254c3356fa723f.tar.xz glibc-63da5cd4a097d089033d980c42254c3356fa723f.zip | |
powerpc: Replace lxvd2x/stxvd2x with lvx/stvx in P7's memcpy/memmove
POWER9 DD2.1 and earlier has an issue where some cache inhibited vector load traps to the kernel, causing a performance degradation. To handle this in memcpy and memmove, lvx/stvx is used for aligned addresses instead of lxvd2x/stxvd2x. Reference: https://patchwork.ozlabs.org/patch/814059/ * sysdeps/powerpc/powerpc64/power7/memcpy.S: Replace lxvd2x/stxvd2x with lvx/stvx. * sysdeps/powerpc/powerpc64/power7/memmove.S: Likewise. Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com> Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Diffstat (limited to 'math/feenablxcpt.c')
0 files changed, 0 insertions, 0 deletions