tunables, aarch64: New tunable to override cpu

Add a new tunable (glibc.tune.cpu) to override CPU identification on
aarch64.  This is useful in two cases: one where it is desirable to
pretend to be another CPU for purposes of testing or because routines
written for that CPU are beneficial for specific workloads and second
where the underlying kernel does not support emulation of MRS to get
the MIDR of the CPU.

	* elf/dl-tunables.h (tunable_is_name): Move from...
	* elf/dl-tunables.c (is_name): ... here.
	(parse_tunables, __tunables_init): Adjust.
	* manual/tunables.texi: Document glibc.tune.cpu.
	* sysdeps/aarch64/dl-tunables.list: New file.
	* sysdeps/unix/sysv/linux/aarch64/cpu-features.c (struct
	cpu_list): New type.
	(cpu_list): New list of CPU names and their MIDR.
	(get_midr_from_mcpu): New function.
	(init_cpu_features): Override MIDR if necessary.

1 files changed, 8 insertions, 0 deletions

diff --git a/manual/tunables.texi b/manual/tunables.texi
index 689e8941e7..9331b03702 100644
--- a/manual/tunables.texi
+++ b/manual/tunables.texi
@@ -231,6 +231,14 @@ the ones in @code{sysdeps/x86/cpu-features.h}.
 This tunable is specific to i386 and x86-64.
 @end deftp
 
+@deftp Tunable glibc.tune.cpu
+The @code{glibc.tune.cpu=xxx} tunable allows the user to tell @theglibc{} to
+assume that the CPU is @code{xxx} where xxx may have one of these values:
+@code{generic}, @code{thunderxt88}.
+
+This tunable is specific to aarch64.
+@end deftp
+
 @deftp Tunable glibc.tune.x86_data_cache_size
 The @code{glibc.tune.x86_data_cache_size} tunable allows the user to set
 data cache size in bytes for use in memory and string routines.