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| author | H.J. Lu <hjl.tools@gmail.com> | 2023-04-05 09:21:28 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2023-04-05 14:46:10 -0700 |
| commit | 8c8e39116604fcd1101658f31dd136754a4aca6e (patch) | |
| tree | 326c23de8a42139dba5f32ded976184defaaf3f3 /manual | |
| parent | 083204a0e219bbfe0a475fcd3dcd0a579be17b48 (diff) | |
| download | glibc-8c8e39116604fcd1101658f31dd136754a4aca6e.tar.gz glibc-8c8e39116604fcd1101658f31dd136754a4aca6e.tar.xz glibc-8c8e39116604fcd1101658f31dd136754a4aca6e.zip | |
<sys/platform/x86.h>: Add LA57 support
Add 57-bit linear addresses and five-level paging (LA57) support to <sys/platform/x86.h>. Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
Diffstat (limited to 'manual')
| -rw-r--r-- | manual/platform.texi | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/manual/platform.texi b/manual/platform.texi index c1cef570d2..9251b63e47 100644 --- a/manual/platform.texi +++ b/manual/platform.texi @@ -395,6 +395,9 @@ the indirect branch predictor barrier (IBPB). @code{L1D_FLUSH} -- IA32_FLUSH_CMD MSR. @item +@code{LA57} -- 57-bit linear addresses and five-level paging. + +@item @code{LAHF64_SAHF64} -- LAHF/SAHF available in 64-bit mode. @item |