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| author | H.J. Lu <hjl.tools@gmail.com> | 2023-04-05 09:21:40 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2023-04-05 14:46:10 -0700 |
| commit | b39741b45f3de7090a7f7fdd8bc487382d53b848 (patch) | |
| tree | 71c9b9db7a740e901d32e7a41c4a603b23e189ee /manual/platform.texi | |
| parent | 96037c697d5a5b1bc19caae74dddf45e041b0ffd (diff) | |
| download | glibc-b39741b45f3de7090a7f7fdd8bc487382d53b848.tar.gz glibc-b39741b45f3de7090a7f7fdd8bc487382d53b848.tar.xz glibc-b39741b45f3de7090a7f7fdd8bc487382d53b848.zip | |
<sys/platform/x86.h>: Add MSRLIST support
Add MSRLIST support to <sys/platform/x86.h>. Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
Diffstat (limited to 'manual/platform.texi')
| -rw-r--r-- | manual/platform.texi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/manual/platform.texi b/manual/platform.texi index af75e5c413..bfccd024a5 100644 --- a/manual/platform.texi +++ b/manual/platform.texi @@ -465,6 +465,10 @@ the indirect branch predictor barrier (IBPB). @code{MSR} -- Model Specific Registers RDMSR and WRMSR instructions. @item +@code{MSRLIST} -- RDMSRLIST/WRMSRLIST instructions and IA32_BARRIER +MSR. + +@item @code{MTRR} -- Memory Type Range Registers. @item |