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authorNoah Goldstein <goldstein.w.n@gmail.com>2023-09-20 15:44:50 -0500
committerNoah Goldstein <goldstein.w.n@gmail.com>2023-09-29 14:18:42 -0500
commitd90b43a4ed475dac5b0cd6e01ceb35c7b0f7f2ff (patch)
tree0015cc47ecb9affe00f1d8afbebf4a5c16d20e25 /manual/platform.texi
parent5f913506f4bf4785f9cf2c2ac8d17dc9f877ff17 (diff)
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x86: Add support for AVX10 preset and vec size in cpu-features
This commit add support for the new AVX10 cpu features:
https://cdrdv2-public.intel.com/784267/355989-intel-avx10-spec.pdf

We add checks for:
    - `AVX10`: Check if AVX10 is present.
    - `AVX10_{X,Y,Z}MM`: Check if a given vec class has AVX10 support.

`make check` passes and cpuid output was checked against GNR/DMR on an
emulator.
Diffstat (limited to 'manual/platform.texi')
-rw-r--r--manual/platform.texi12
1 files changed, 12 insertions, 0 deletions
diff --git a/manual/platform.texi b/manual/platform.texi
index 2a2d557067..478b6fdcdf 100644
--- a/manual/platform.texi
+++ b/manual/platform.texi
@@ -223,6 +223,18 @@ Leaf (EAX = 23H).
 @code{AVX} -- The AVX instruction extensions.
 
 @item
+@code{AVX10} -- The AVX10 instruction extensions.
+
+@item
+@code{AVX10_XMM} -- Whether AVX10 includes xmm registers.
+
+@item
+@code{AVX10_YMM} -- Whether AVX10 includes ymm registers.
+
+@item
+@code{AVX10_ZMM} -- Whether AVX10 includes zmm registers.
+
+@item
 @code{AVX2} -- The AVX2 instruction extensions.
 
 @item