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| author | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2021-06-08 12:48:43 +0100 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2022-11-22 14:31:25 +0000 |
| commit | 7cbc4d39feaf6ec88ffe83a8524191c98925b955 (patch) | |
| tree | 53486da4a3712c82e1b39a5ffe4b3d23e03ccb1d /include | |
| parent | faee37cd4c29f5265c817b05a0103486fd02a957 (diff) | |
| download | glibc-7cbc4d39feaf6ec88ffe83a8524191c98925b955.tar.gz glibc-7cbc4d39feaf6ec88ffe83a8524191c98925b955.tar.xz glibc-7cbc4d39feaf6ec88ffe83a8524191c98925b955.zip | |
cheri: Implement 128-bit atomics
Arm Morello requires 128-bit atomics.
Diffstat (limited to 'include')
| -rw-r--r-- | include/atomic.h | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/include/atomic.h b/include/atomic.h index 2cb52c9cfd..140ef2a5a5 100644 --- a/include/atomic.h +++ b/include/atomic.h @@ -62,6 +62,8 @@ __atg1_result = pre##_32_##post (mem, __VA_ARGS__); \ else if (sizeof (*mem) == 8) \ __atg1_result = pre##_64_##post (mem, __VA_ARGS__); \ + else if (sizeof (*mem) == 16) \ + __atg1_result = pre##_128_##post (mem, __VA_ARGS__); \ else \ abort (); \ __atg1_result; \ @@ -77,6 +79,8 @@ __atg2_result = pre##_32_##post (mem, __VA_ARGS__); \ else if (sizeof (*mem) == 8) \ __atg2_result = pre##_64_##post (mem, __VA_ARGS__); \ + else if (sizeof (*mem) == 16) \ + __atg2_result = pre##_128_##post (mem, __VA_ARGS__); \ else \ abort (); \ __atg2_result; \ @@ -540,7 +544,11 @@ /* We require 32b atomic operations; some archs also support 64b atomic operations. */ void __atomic_link_error (void); -# if __HAVE_64B_ATOMICS == 1 +# if defined __CHERI_PURE_CAPABILITY__ +# define __atomic_check_size(mem) \ + if ((sizeof (*mem) != 4) && (sizeof (*mem) != 8) && (sizeof (*mem) != 16)) \ + __atomic_link_error (); +# elif __HAVE_64B_ATOMICS == 1 # define __atomic_check_size(mem) \ if ((sizeof (*mem) != 4) && (sizeof (*mem) != 8)) \ __atomic_link_error (); @@ -553,7 +561,12 @@ void __atomic_link_error (void); need other atomic operations of such sizes, and restricting the support to loads and stores makes this easier for archs that do not have native support for atomic operations to less-than-word-sized data. */ -# if __HAVE_64B_ATOMICS == 1 +# if defined __CHERI_PURE_CAPABILITY__ +# define __atomic_check_size_ls(mem) \ + if ((sizeof (*mem) != 1) && (sizeof (*mem) != 2) && (sizeof (*mem) != 4) \ + && (sizeof (*mem) != 8) && (sizeof (*mem) != 16)) \ + __atomic_link_error (); +# elif __HAVE_64B_ATOMICS == 1 # define __atomic_check_size_ls(mem) \ if ((sizeof (*mem) != 1) && (sizeof (*mem) != 2) && (sizeof (*mem) != 4) \ && (sizeof (*mem) != 8)) \ |