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author | H.J. Lu <hjl.tools@gmail.com> | 2020-09-18 07:55:14 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2021-01-14 11:38:45 -0800 |
commit | 2d651eb9265d1366d7b9e881bfddd46db9c1ecc4 (patch) | |
tree | e7ab45e6e14b7be7729b8ae06aa911f97d446d37 /elf/tst-glibc-hwcaps-2-cache.root | |
parent | d18f59bf9223e9342be16baa2411ef3acc3f7ea4 (diff) | |
download | glibc-2d651eb9265d1366d7b9e881bfddd46db9c1ecc4.tar.gz glibc-2d651eb9265d1366d7b9e881bfddd46db9c1ecc4.tar.xz glibc-2d651eb9265d1366d7b9e881bfddd46db9c1ecc4.zip |
x86: Move x86 processor cache info to cpu_features
1. Move x86 processor cache info to _dl_x86_cpu_features in ld.so. 2. Update tunable bounds with TUNABLE_SET_WITH_BOUNDS. 3. Move x86 cache info initialization to dl-cacheinfo.h and initialize x86 cache info in init_cpu_features (). 4. Put x86 cache info for libc in cacheinfo.h, which is included in libc-start.c in libc.a and is included in cacheinfo.c in libc.so. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Diffstat (limited to 'elf/tst-glibc-hwcaps-2-cache.root')
0 files changed, 0 insertions, 0 deletions