Revert "MIPS: Sync elf.h from binutils"

Leads to build failures (preprocessor redefinitions), and there is not
enough time to address this properly. Deferred until after 2.38 release.

This reverts commit 59dc07637fa1a693bd7599a98b0735697544077b.

Signed-off-by: Andreas K. Hüttel <dilfridge@gentoo.org>

1 files changed, 3 insertions, 137 deletions

diff --git a/elf/elf.h b/elf/elf.h
index 52afec437c..89fc8021e9 100644
--- a/elf/elf.h
+++ b/elf/elf.h
@@ -678,9 +678,6 @@ typedef Elf64_Xword	Elf64_Relr;
 
 #define ELF64_R_SYM(i)			((i) >> 32)
 #define ELF64_R_TYPE(i)			((i) & 0xffffffff)
-#define ELF64_MIPS_R_TYPE(i)		((i) & 0xff)
-#define ELF64_MIPS_R_TYPE2(i)		(((i) >> 8) & 0xff)
-#define ELF64_MIPS_R_TYPE3(i)		(((i) >> 16) & 0xff)
 #define ELF64_R_INFO(sym,type)		((((Elf64_Xword) (sym)) << 32) + (type))
 
 /* Program segment header.  */
@@ -1688,25 +1685,11 @@ typedef struct
 #define EF_MIPS_PIC		2     /* Contains PIC code.  */
 #define EF_MIPS_CPIC		4     /* Uses PIC calling sequence.  */
 #define EF_MIPS_XGOT		8
-#define EF_MIPS_UCODE		16
+#define EF_MIPS_64BIT_WHIRL	16
 #define EF_MIPS_ABI2		32
 #define EF_MIPS_ABI_ON32	64
-#define EF_MIPS_OPTIONS_FIRST	0x00000080 /* Process the .MIPS.options
-					      section first by ld.  */
-#define EF_MIPS_32BITMODE	0x00000100 /* Indicates code compiled for
-					      a 64-bit machine in 32-bit
-					      mode (regs are 32-bits
-					      wide).  */
 #define EF_MIPS_FP64		512  /* Uses FP64 (12 callee-saved).  */
 #define EF_MIPS_NAN2008	1024  /* Uses IEEE 754-2008 NaN encoding.  */
-#define EF_MIPS_ARCH_ASE	0x0f000000 /* Architectural Extensions
-					      used by this file.  */
-#define EF_MIPS_ARCH_ASE_MDMX	0x08000000 /* Use MDMX multimedia
-					      extensions.  */
-#define EF_MIPS_ARCH_ASE_M16	0x04000000 /* Use MIPS-16 ISA
-					      extensions.  */
-#define EF_MIPS_ARCH_ASE_MICROMIPS	0x02000000 /* Use MICROMIPS ISA
-						      extensions.  */
 #define EF_MIPS_ARCH		0xf0000000 /* MIPS architecture level.  */
 
 /* Legal values for MIPS architecture level.  */
@@ -1720,37 +1703,6 @@ typedef struct
 #define EF_MIPS_ARCH_64		0x60000000 /* MIPS64 code.  */
 #define EF_MIPS_ARCH_32R2	0x70000000 /* MIPS32r2 code.  */
 #define EF_MIPS_ARCH_64R2	0x80000000 /* MIPS64r2 code.  */
-#define EF_MIPS_ARCH_32R6	0x90000000 /* MIPS32r6 code.  */
-#define EF_MIPS_ARCH_64R6	0xa0000000 /* MIPS64r6 code.  */
-#define EF_MIPS_ABI		0x0000F000 /* The ABI of the file.  Also
-					      see EF_MIPS_ABI2 above.  */
-#define EF_MIPS_ABI_O32		0x00001000 /* The original o32 abi.  */
-#define EF_MIPS_ABI_O64		0x00002000 /* O32 extended to work on
-					      64 bit architectures.  */
-#define EF_MIPS_ABI_EABI32	0x00003000 /* EABI in 32 bit mode.  */
-#define EF_MIPS_ABI_EABI64	0x00004000 /* EABI in 64 bit mode.  */
-#define EF_MIPS_MACH		0x00FF0000
-#define EF_MIPS_MACH_3900	0x00810000
-#define EF_MIPS_MACH_4010	0x00820000
-#define EF_MIPS_MACH_4100	0x00830000
-#define EF_MIPS_MACH_4650	0x00850000
-#define EF_MIPS_MACH_4120	0x00870000
-#define EF_MIPS_MACH_4111	0x00880000
-#define EF_MIPS_MACH_SB1	0x008a0000
-#define EF_MIPS_MACH_OCTEON	0x008b0000
-#define EF_MIPS_MACH_XLR	0x008c0000
-#define EF_MIPS_MACH_OCTEON2	0x008d0000
-#define EF_MIPS_MACH_OCTEON3	0x008e0000
-#define EF_MIPS_MACH_5400	0x00910000
-#define EF_MIPS_MACH_5900	0x00920000
-#define EF_MIPS_MACH_IAMR2	0x00930000
-#define EF_MIPS_MACH_5500	0x00980000
-#define EF_MIPS_MACH_9000	0x00990000
-#define EF_MIPS_MACH_LS2E	0x00A00000
-#define EF_MIPS_MACH_LS2F	0x00A10000
-#define EF_MIPS_MACH_GS464	0x00A20000
-#define EF_MIPS_MACH_GS464E	0x00A30000
-#define EF_MIPS_MACH_GS264E	0x00A40000
 
 /* The following are unofficial names and should not be used.  */
 
@@ -1811,7 +1763,6 @@ typedef struct
 #define SHT_MIPS_EH_REGION	0x70000027
 #define SHT_MIPS_XLATE_OLD	0x70000028
 #define SHT_MIPS_PDR_EXCEPTION	0x70000029
-#define SHT_MIPS_ABIFLAGS	0x7000002a
 #define SHT_MIPS_XHASH		0x7000002b
 
 /* Legal values for sh_flags field of Elf32_Shdr.  */
@@ -1980,68 +1931,10 @@ typedef struct
 #define R_MIPS_TLS_TPREL_HI16	49	/* TP-relative offset, high 16 bits */
 #define R_MIPS_TLS_TPREL_LO16	50	/* TP-relative offset, low 16 bits */
 #define R_MIPS_GLOB_DAT		51
-#define R_MIPS_PC21_S2		60
-#define R_MIPS_PC26_S2		61
-#define R_MIPS_PC18_S3		62
-#define R_MIPS_PC19_S2		63
-#define R_MIPS_PCHI16		64
-#define R_MIPS_PCLO16		65
-#define R_MIPS16_26		100
-#define R_MIPS16_GPREL		101
-#define R_MIPS16_GOT16		102
-#define R_MIPS16_CALL16		103
-#define R_MIPS16_HI16		104
-#define R_MIPS16_LO16		105
-#define R_MIPS16_TLS_GD		106
-#define R_MIPS16_TLS_LDM	107
-#define R_MIPS16_TLS_DTPREL_HI16	108
-#define R_MIPS16_TLS_DTPREL_LO16	109
-#define R_MIPS16_TLS_GOTTPREL	110
-#define R_MIPS16_TLS_TPREL_HI16	111
-#define R_MIPS16_TLS_TPREL_LO16	112
-#define R_MIPS16_PC16_S1	113
 #define R_MIPS_COPY		126
 #define R_MIPS_JUMP_SLOT        127
-#define R_MIPS_RELATIVE		128
-#define R_MICROMIPS_26_S1	133
-#define R_MICROMIPS_HI16	134
-#define R_MICROMIPS_LO16	135
-#define R_MICROMIPS_GPREL16	136
-#define R_MICROMIPS_LITERAL	137
-#define R_MICROMIPS_GOT16	138
-#define R_MICROMIPS_PC7_S1	139
-#define R_MICROMIPS_PC10_S1	140
-#define R_MICROMIPS_PC16_S1	141
-#define R_MICROMIPS_CALL16	142
-#define R_MICROMIPS_GOT_DISP	145
-#define R_MICROMIPS_GOT_PAGE	146
-#define R_MICROMIPS_GOT_OFST	147
-#define R_MICROMIPS_GOT_HI16	148
-#define R_MICROMIPS_GOT_LO16	149
-#define R_MICROMIPS_SUB		150
-#define R_MICROMIPS_HIGHER	151
-#define R_MICROMIPS_HIGHEST	152
-#define R_MICROMIPS_CALL_HI16	153
-#define R_MICROMIPS_CALL_LO16	154
-#define R_MICROMIPS_SCN_DISP	155
-#define R_MICROMIPS_JALR	156
-#define R_MICROMIPS_HI0_LO16	157
-#define R_MICROMIPS_TLS_GD	162
-#define R_MICROMIPS_TLS_LDM	163
-#define R_MICROMIPS_TLS_DTPREL_HI16	164
-#define R_MICROMIPS_TLS_DTPREL_LO16	165
-#define R_MICROMIPS_TLS_GOTTPREL	166
-#define R_MICROMIPS_TLS_TPREL_HI16	169
-#define R_MICROMIPS_TLS_TPREL_LO16	170
-#define R_MICROMIPS_GPREL7_S2	172
-#define R_MICROMIPS_PC23_S2	173
-#define R_MIPS_PC32		248
-#define R_MIPS_EH		249
-#define R_MIPS_GNU_REL16_S2	250
-#define R_MIPS_GNU_VTINHERIT	253
-#define R_MIPS_GNU_VTENTRY	254
 /* Keep this the last entry.  */
-#define R_MIPS_NUM		255
+#define R_MIPS_NUM		128
 
 /* Legal values for p_type field of Elf32_Phdr.  */
 
@@ -2249,30 +2142,6 @@ typedef struct
 /* Masks for the flags1 word of an ABI flags structure.  */
 #define MIPS_AFL_FLAGS1_ODDSPREG  1  /* Uses odd single-precision registers.  */
 
-/* Object attribute tags.  */
-enum
-{
-  /* 0-3 are generic.  */
-
-  /* Floating-point ABI used by this object file.  */
-  Tag_GNU_MIPS_ABI_FP = 4,
-
-  /* MSA ABI used by this object file.  */
-  Tag_GNU_MIPS_ABI_MSA = 8,
-};
-
-/* Object attribute values.  */
-enum
-{
-  /* Values defined for Tag_GNU_MIPS_ABI_MSA.  */
-
-  /* Not tagged or not using any ABIs affected by the differences.  */
-  Val_GNU_MIPS_ABI_MSA_ANY = 0,
-
-  /* Using 128-bit MSA.  */
-  Val_GNU_MIPS_ABI_MSA_128 = 1,
-};
-
 /* Object attribute values.  */
 enum
 {
@@ -2292,11 +2161,8 @@ enum
   Val_GNU_MIPS_ABI_FP_64 = 6,
   /* Using -mips32r2 -mfp64 -mno-odd-spreg.  */
   Val_GNU_MIPS_ABI_FP_64A = 7,
-  /* This is reserved for backward-compatibility with an earlier
-     implementation of the MIPS NaN2008 functionality.  */
-  Val_GNU_MIPS_ABI_FP_NAN2008 = 8,
   /* Maximum allocated FP ABI value.  */
-  Val_GNU_MIPS_ABI_FP_MAX = 8
+  Val_GNU_MIPS_ABI_FP_MAX = 7
 };
 
 /* HPPA specific definitions.  */