about summary refs log tree commit diff
path: root/conform
diff options
context:
space:
mode:
authorH.J. Lu <hjl.tools@gmail.com>2016-05-27 15:16:22 -0700
committerH.J. Lu <hjl.tools@gmail.com>2016-06-06 13:34:29 -0700
commit5a4f52493bc18322749ab15c4f5ae8deb7977201 (patch)
treedc20ab190ce16a14a959adaf628454fd422af5b8 /conform
parent5879566b641cf573099ce9200eb44148e40b9b34 (diff)
downloadglibc-hjl/erms/2.23.tar.gz
glibc-hjl/erms/2.23.tar.xz
glibc-hjl/erms/2.23.zip
Count number of logical processors sharing L2 cache hjl/erms/2.23
For Intel processors, when there are both L2 and L3 caches, SMT level
type should be ued to count number of available logical processors
sharing L2 cache.  If there is only L2 cache, core level type should
be used to count number of available logical processors sharing L2
cache.  Number of available logical processors sharing L2 cache should
be used for non-inclusive L2 and L3 caches.

	* sysdeps/x86/cacheinfo.c (init_cacheinfo): Count number of
	available logical processors with SMT level type sharing L2
	cache for Intel processors.
Diffstat (limited to 'conform')
0 files changed, 0 insertions, 0 deletions