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| author | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2020-10-22 17:55:01 +0100 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2020-11-04 12:26:02 +0000 |
| commit | a3c78954ee0009e558b7e6b9eb05208814099e21 (patch) | |
| tree | 87a9063333322b9825757bd0a6306afb1c93c3bb /bits | |
| parent | 28ff0f650c36a2871eb968751be77fd38673c1c6 (diff) | |
| download | glibc-a3c78954ee0009e558b7e6b9eb05208814099e21.tar.gz glibc-a3c78954ee0009e558b7e6b9eb05208814099e21.tar.xz glibc-a3c78954ee0009e558b7e6b9eb05208814099e21.zip | |
aarch64: Fix DT_AARCH64_VARIANT_PCS handling [BZ #26798]
The variant PCS support was ineffective because in the common case linkmap->l_mach.plt == 0 but then the symbol table flags were ignored and normal lazy binding was used instead of resolving the relocs early. (This was a misunderstanding about how GOT[1] is setup by the linker.) In practice this mainly affects SVE calls when the vector length is more than 128 bits, then the top bits of the argument registers get clobbered during lazy binding. Fixes bug 26798. (cherry picked from commit 558251bd8785760ad40fcbfeaaee5d27fa5b0fe4)
Diffstat (limited to 'bits')
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