diff options
| author | Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com> | 2017-09-19 13:55:49 +0530 |
|---|---|---|
| committer | Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com> | 2017-09-19 13:55:49 +0530 |
| commit | bd17ba29eb5cb4ec7251c1ed0b4dcd7d287c0c0c (patch) | |
| tree | 7be77d387aac0fb4d0140211fadf6002c8b6f9e7 /benchtests/Makefile | |
| parent | 6d9b0b5a22738e100b57bdd593d799abac4949d7 (diff) | |
| download | glibc-bd17ba29eb5cb4ec7251c1ed0b4dcd7d287c0c0c.tar.gz glibc-bd17ba29eb5cb4ec7251c1ed0b4dcd7d287c0c0c.tar.xz glibc-bd17ba29eb5cb4ec7251c1ed0b4dcd7d287c0c0c.zip | |
powerpc: Avoid misaligned stores in memset
As per the section "3.1.4.2 Alignment Interrupts" of the "POWER8 Processor User's Manual for the Single-Chip Module", alignment interrupt is reported for misaligned stores in Caching-inhibited storage. As memset is used in some drivers for DMA (like xorg), this patch avoids misaligned stores for sizes less than 8 in memset.
Diffstat (limited to 'benchtests/Makefile')
0 files changed, 0 insertions, 0 deletions