Prepare for radical source tree reorganization. zack/build-layout-experiment

All top-level files and directories are moved into a temporary storage
directory, REORG.TODO, except for files that will certainly still
exist in their current form at top level when we're done (COPYING,
COPYING.LIB, LICENSES, NEWS, README), all old ChangeLog files (which
are moved to the new directory OldChangeLogs, instead), and the
generated file INSTALL (which is just deleted; in the new order, there
will be no generated files checked into version control).

1 files changed, 95 insertions, 0 deletions

diff --git a/REORG.TODO/sysdeps/m68k/fpu/bits/fenv.h b/REORG.TODO/sysdeps/m68k/fpu/bits/fenv.h
new file mode 100644
index 0000000000..b99bb7d830
--- /dev/null
+++ b/REORG.TODO/sysdeps/m68k/fpu/bits/fenv.h
@@ -0,0 +1,95 @@
+/* Copyright (C) 1997-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _FENV_H
+# error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
+#endif
+
+
+/* Define bits representing the exception.  We use the bit positions of
+   the appropriate bits in the FPSR Accrued Exception Byte.  */
+enum
+  {
+    FE_INEXACT =
+#define FE_INEXACT	(1 << 3)
+      FE_INEXACT,
+    FE_DIVBYZERO =
+#define FE_DIVBYZERO	(1 << 4)
+      FE_DIVBYZERO,
+    FE_UNDERFLOW =
+#define FE_UNDERFLOW	(1 << 5)
+      FE_UNDERFLOW,
+    FE_OVERFLOW =
+#define FE_OVERFLOW	(1 << 6)
+      FE_OVERFLOW,
+    FE_INVALID =
+#define FE_INVALID	(1 << 7)
+      FE_INVALID
+  };
+
+#define FE_ALL_EXCEPT \
+	(FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID)
+
+/* The m68k FPU supports all of the four defined rounding modes.  We use
+   the bit positions in the FPCR Mode Control Byte as the values for the
+   appropriate macros.  */
+enum
+  {
+    FE_TONEAREST =
+#define FE_TONEAREST	0
+      FE_TONEAREST,
+    FE_TOWARDZERO =
+#define FE_TOWARDZERO	(1 << 4)
+      FE_TOWARDZERO,
+    FE_DOWNWARD =
+#define FE_DOWNWARD	(2 << 4)
+      FE_DOWNWARD,
+    FE_UPWARD =
+#define FE_UPWARD	(3 << 4)
+      FE_UPWARD
+  };
+
+
+/* Type representing exception flags.  */
+typedef unsigned int fexcept_t;
+
+
+/* Type representing floating-point environment.  This structure
+   corresponds to the layout of the block written by `fmovem'.  */
+typedef struct
+  {
+    unsigned int __control_register;
+    unsigned int __status_register;
+    unsigned int __instruction_address;
+  }
+fenv_t;
+
+/* If the default argument is used we use this value.  */
+#define FE_DFL_ENV	((const fenv_t *) -1)
+
+#ifdef __USE_GNU
+/* Floating-point environment where none of the exceptions are masked.  */
+# define FE_NOMASK_ENV	((const fenv_t *) -2)
+#endif
+
+#if __GLIBC_USE (IEC_60559_BFP_EXT)
+/* Type representing floating-point control modes.  */
+typedef unsigned int femode_t;
+
+/* Default floating-point control modes.  */
+# define FE_DFL_MODE	((const femode_t *) -1L)
+#endif