about summary refs log tree commit diff
path: root/ChangeLog
diff options
context:
space:
mode:
authorIan Bolton <ian.bolton@arm.com>2014-04-24 07:15:33 +0100
committerMarcus Shawcroft <marcus.shawcroft@linaro.org>2014-04-24 07:15:33 +0100
commite5e0d9a4f632735cf3bb440eecb5caee5eea44c1 (patch)
tree51c5774783bb0479b35a33f9a22b86db00c20cbe /ChangeLog
parentbacc75f7be11656387c239831f490155f5fb3700 (diff)
downloadglibc-e5e0d9a4f632735cf3bb440eecb5caee5eea44c1.tar.gz
glibc-e5e0d9a4f632735cf3bb440eecb5caee5eea44c1.tar.xz
glibc-e5e0d9a4f632735cf3bb440eecb5caee5eea44c1.zip
[AArch64] Suppress unnecessary FPSR and FPCR writes.
Diffstat (limited to 'ChangeLog')
-rw-r--r--ChangeLog15
1 files changed, 15 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog
index a638938fb0..0909d3be56 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,18 @@
+2014-04-24  Ian Bolton  <ian.bolton@arm.com>
+
+	* sysdeps/aarch64/fpu/fclrexcpt.c (feclearexcept): Don't write to
+	fpsr if value didn't change.
+	* sysdeps/aarch64/fpu/fedisblxcpt.c (fedisableexcept): Don't write
+	to fpcr if value didn't change.
+	* sysdeps/aarch64/fpu/feenablxcpt.c (feenableexcept): Likewise.
+	* sysdeps/aarch64/fpu/feholdexcpt.c (feholdexcept): Don't write to
+	fpsr or fpcr if value didn't change.
+	* sysdeps/aarch64/fpu/fesetenv.c (fesetenv): Likewise.
+	* sysdeps/aarch64/fpu/fesetround.c (fesetround): Don't write to
+	fpcr if value didn't change.
+	* sysdeps/aarch64/fpu/fsetexcptflg.c (fesetexceptflag): Don't write
+	to fpsr if value didn't change.
+
 2014-02-23  Siddhesh Poyarekar  <siddhesh@redhat.com>
 
 	* nptl/tst-sem3.c: Use test-skeleton.c