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author | David S. Miller <davem@davemloft.net> | 2012-05-11 13:58:41 -0700 |
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committer | David S. Miller <davem@davemloft.net> | 2012-05-11 13:58:41 -0700 |
commit | 842b81d6113b45c9a10a93dd8415639c414df946 (patch) | |
tree | 18668c734d4243b1e721637ab160f9420f18c7ff /ChangeLog | |
parent | 1cf463cd4e499488cbea70c50939d22b6ffc045f (diff) | |
download | glibc-842b81d6113b45c9a10a93dd8415639c414df946.tar.gz glibc-842b81d6113b45c9a10a93dd8415639c414df946.tar.xz glibc-842b81d6113b45c9a10a93dd8415639c414df946.zip |
Mark sparc %fsr load and store inline asms as volatile.
* sysdeps/sparc/fpu/bits/fenv.h (__fenv_stfsr): Add __volatile__. * sysdeps/sparc/fpu/fpu_control.h (_FPU_GETCW): Likewise. (_FPU_SETCW): Likewise.
Diffstat (limited to 'ChangeLog')
-rw-r--r-- | ChangeLog | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog index dcc28d5da7..d3a2a8e51b 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,9 @@ +2012-05-11 David S. Miller <davem@davemloft.net> + + * sysdeps/sparc/fpu/bits/fenv.h (__fenv_stfsr): Add __volatile__. + * sysdeps/sparc/fpu/fpu_control.h (_FPU_GETCW): Likewise. + (_FPU_SETCW): Likewise. + 2012-05-10 H.J. Lu <hongjiu.lu@intel.com> * sysdeps/x86_64/dl-trampoline.S: Check if RTLD_SAVESPACE_SSE |