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| author | H.J. Lu <hjl.tools@gmail.com> | 2016-05-20 14:41:14 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2016-05-20 14:42:00 -0700 |
| commit | b7598b1b855b39628104feb9a1f6151a86351a64 (patch) | |
| tree | a59690d12b5a09273bafd6cede80a75514c44816 /ChangeLog | |
| parent | b003c666efc6c25908a36bcabee87a2bf1c49a09 (diff) | |
| download | glibc-b7598b1b855b39628104feb9a1f6151a86351a64.tar.gz glibc-b7598b1b855b39628104feb9a1f6151a86351a64.tar.xz glibc-b7598b1b855b39628104feb9a1f6151a86351a64.zip | |
Remove special L2 cache case for Knights Landing
L2 cache is shared by 2 cores on Knights Landing, which has 4 threads per core: https://en.wikipedia.org/wiki/Xeon_Phi#Knights_Landing So L2 cache is shared by 8 threads on Knights Landing as reported by CPUID. We should remove special L2 cache case for Knights Landing. [BZ #18185] * sysdeps/x86/cacheinfo.c (init_cacheinfo): Don't limit threads sharing L2 cache to 2 for Knights Landing.
Diffstat (limited to 'ChangeLog')
| -rw-r--r-- | ChangeLog | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog index 0d9a25cbb9..c5ed4cdbbb 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,9 @@ +2016-05-20 H.J. Lu <hongjiu.lu@intel.com> + + [BZ #18185] + * sysdeps/x86/cacheinfo.c (init_cacheinfo): Don't limit threads + sharing L2 cache to 2 for Knights Landing. + 2016-05-20 Joseph Myers <joseph@codesourcery.com> * conform/data/ftw.h-data (struct FTW): Do not expect for [XPG3]. |