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| author | Marcus Shawcroft <marcus.shawcroft@arm.com> | 2014-03-07 14:05:20 +0000 |
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| committer | Marcus Shawcroft <marcus.shawcroft@arm.com> | 2014-03-07 14:05:20 +0000 |
| commit | 302949e2940a9da3f6364a1574619e621b7e1e71 (patch) | |
| tree | 584f5e0c4fe14716a318fe8745b2c79554115957 /ChangeLog | |
| parent | 6f99f280b00a30b8f0a89a4be1adb2bea41e2954 (diff) | |
| download | glibc-302949e2940a9da3f6364a1574619e621b7e1e71.tar.gz glibc-302949e2940a9da3f6364a1574619e621b7e1e71.tar.xz glibc-302949e2940a9da3f6364a1574619e621b7e1e71.zip | |
[PATCH] [AArch64] Optional trapping exceptions support.
Trapping exceptions in AArch64 are optional. The relevant exception control bits in FPCR are are defined as RES0 hence the absence of support can be detected by reading back the FPCR and comparing with the desired value.
Diffstat (limited to 'ChangeLog')
| -rw-r--r-- | ChangeLog | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog index 51020ec5c7..88b70f1a7c 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,9 @@ +2014-03-07 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * sysdeps/aarch64/fpu/feenablxcpt.c (feenableexcept): Detect and + error absence of trapping exception support. + * sysdeps/aarch64/fpu/fesetenv.c (fesetenv): Likewise. + 2014-03-07 Joseph Myers <joseph@codesourcery.com> * catgets/Makefile (tests-special): Add $(objpfx)sample.SJIS.cat. |