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authorRichard Henderson <rth@twiddle.net>2017-11-03 16:38:16 +0000
committerSzabolcs Nagy <szabolcs.nagy@arm.com>2017-11-03 16:40:27 +0000
commit6d58ce5e5072945d44f2dba83ad16cd6febd056c (patch)
tree35cd666ef3c3feb4130d963d08620734ef4bc51c /ChangeLog
parent659ca267360e1c1f64eea9205bb81cb5e9049908 (diff)
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aarch64: Guess L1 cache linesize for aarch64
Using the cache hierarchy linesize minimum in CTR_EL0.
See the comment within the code for rationale.

	* sysdeps/unix/sysv/linux/aarch64/sysconf.c: New file.
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+2017-11-03  Richard Henderson  <rth@twiddle.net>
+
+	* sysdeps/unix/sysv/linux/aarch64/sysconf.c: New file.
+
 2017-11-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 
 	* sysdeps/aarch64/dl-tlsdesc.S (_dl_tlsdesc_dynamic): Optimize.