summary refs log tree commit diff
path: root/ChangeLog
diff options
context:
space:
mode:
authorH.J. Lu <hjl.tools@gmail.com>2016-04-01 09:57:40 -0700
committerH.J. Lu <hjl.tools@gmail.com>2016-04-01 09:57:53 -0700
commit32b28d24a1183bb411c813e51186c2896dd3efe3 (patch)
tree00edecabffe7715e83f241e2e6cb6408d4b2c4bc /ChangeLog
parent528ffb3a04966ce5dbc24e256c1926087876b6f7 (diff)
downloadglibc-32b28d24a1183bb411c813e51186c2896dd3efe3.tar.gz
glibc-32b28d24a1183bb411c813e51186c2896dd3efe3.tar.xz
glibc-32b28d24a1183bb411c813e51186c2896dd3efe3.zip
Test 64-byte alignment in memcpy benchtest
Add 64-byte alignment tests in memcpy benchtest for 64-byte vector
registers.

	* benchtests/bench-memcpy.c (test_main): Test 64-byte alignment.
Diffstat (limited to 'ChangeLog')
-rw-r--r--ChangeLog4
1 files changed, 4 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog
index 846a41d3db..08b6e0b656 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,7 @@
+2016-04-01   H.J. Lu  <hongjiu.lu@intel.com>
+
+	* benchtests/bench-memcpy.c (test_main): Test 64-byte alignment.
+
 2016-04-01  Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 
 	* sysdeps/powerpc/powerpc64/strcspn.S: Remove file.