summary refs log tree commit diff
path: root/ChangeLog
diff options
context:
space:
mode:
authorAndrew Senkevich <andrew.senkevich@intel.com>2015-06-18 17:04:07 +0300
committerAndrew Senkevich <andrew.senkevich@intel.com>2015-06-18 17:04:07 +0300
commit8aa92022e2e7cb5470b6e252020140c05b8013ed (patch)
treedfedc663faa6a67fee4bd9a65ec2227fc0e4c534 /ChangeLog
parent2f3184451dc9daf8c15be10f190071409d93232e (diff)
downloadglibc-8aa92022e2e7cb5470b6e252020140c05b8013ed.tar.gz
glibc-8aa92022e2e7cb5470b6e252020140c05b8013ed.tar.xz
glibc-8aa92022e2e7cb5470b6e252020140c05b8013ed.zip
Vector powf for x86_64 and tests.
Here is implementation of vectorized powf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for powf.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines):
    Added build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: Added 2 argument wrappers.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf16_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf8_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf_data.h: New file.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector powf tests.
    * sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
    * math/test-float-vlen16.h: Fixed 2 argument macro.
    * math/test-float-vlen4.h: Likewise.
    * math/test-float-vlen8.h: Likewise.
    * NEWS: Mention addition of x86_64 vector powf.
Diffstat (limited to 'ChangeLog')
-rw-r--r--ChangeLog36
1 files changed, 36 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog
index fb0e2d30e3..bb70aa2b75 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,39 @@
+2015-06-18  Andrew Senkevich  <andrew.senkevich@intel.com>
+
+	* sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
+	* sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
+	redirections for powf.
+	* sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
+	* sysdeps/x86_64/fpu/Versions: New versions added.
+	* sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
+	* sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines):
+	Added build of SSE, AVX2 and AVX512 IFUNC versions.
+	* sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: Added 2 argument wrappers.
+	* sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S: New file.
+	* sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S: New file.
+	* sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S: New file.
+	* sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core_sse4.S: New file.
+	* sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S: New file.
+	* sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core_avx2.S: New file.
+	* sysdeps/x86_64/fpu/svml_s_powf16_core.S: New file.
+	* sysdeps/x86_64/fpu/svml_s_powf4_core.S: New file.
+	* sysdeps/x86_64/fpu/svml_s_powf8_core.S: New file.
+	* sysdeps/x86_64/fpu/svml_s_powf8_core_avx.S: New file.
+	* sysdeps/x86_64/fpu/svml_s_powf_data.S: New file.
+	* sysdeps/x86_64/fpu/svml_s_powf_data.h: New file.
+	* sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector powf tests.
+	* sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
+	* sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
+	* sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
+	* sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
+	* sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
+	* sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
+	* sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
+	* math/test-float-vlen16.h: Fixed 2 argument macro.
+	* math/test-float-vlen4.h: Likewise.
+	* math/test-float-vlen8.h: Likewise.
+	* NEWS: Mention addition of x86_64 vector powf.
+
 2015-06-17  Joseph Myers  <joseph@codesourcery.com>
 
 	* math/s_ctanhl.c [LDBL_MANT_DIG == 106] (LDBL_EPSILON): Undefine