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author | Geoff Keating <geoffk@cygnus.com> | 1999-12-31 01:33:06 +0000 |
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committer | Geoff Keating <geoffk@cygnus.com> | 1999-12-31 01:33:06 +0000 |
commit | 7137f4248dcfebd36c7436bd98c2c3ee2ec57db3 (patch) | |
tree | f28c43834eeb928e3f5d06fa218351cd664e0943 /ChangeLog | |
parent | 83d660c76fb1287f2cd9e6b94ddccb7069a6fae5 (diff) | |
download | glibc-7137f4248dcfebd36c7436bd98c2c3ee2ec57db3.tar.gz glibc-7137f4248dcfebd36c7436bd98c2c3ee2ec57db3.tar.xz glibc-7137f4248dcfebd36c7436bd98c2c3ee2ec57db3.zip |
* sysdeps/powerpc/dl-machine.c: Many minor formatting changes. (OPCODE_LWZU): New macro. (OPCODE_ADDIS_HI): New macro. (OPCODE_LIS_HI): New macro. (__elf_machine_runtime_setup): Change PLT code-generation scheme for thread safety even with very large PLTs, better efficiency, and to fix a cache-flushing bug. Also support the Motorola 8xx processors which have a different cache line size than all the others. (__elf_machine_fixup_plt): Likewise. (__process_machine_rela): Don't use elf_machine_fixup_plt.
1999-12-30 Geoffrey Keating <geoffk@cygnus.com> * sysdeps/powerpc/dl-machine.c: Many minor formatting changes. (OPCODE_LWZU): New macro. (OPCODE_ADDIS_HI): New macro. (OPCODE_LIS_HI): New macro. (__elf_machine_runtime_setup): Change PLT code-generation scheme for thread safety even with very large PLTs, better efficiency, and to fix a cache-flushing bug. Also support the Motorola 8xx processors which have a different cache line size than all the others. (__elf_machine_fixup_plt): Likewise. (__process_machine_rela): Don't use elf_machine_fixup_plt.
Diffstat (limited to 'ChangeLog')
-rw-r--r-- | ChangeLog | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog index 35b9f26830..b8c52d7b48 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,17 @@ +1999-12-30 Geoffrey Keating <geoffk@cygnus.com> + + * sysdeps/powerpc/dl-machine.c: Many minor formatting changes. + (OPCODE_LWZU): New macro. + (OPCODE_ADDIS_HI): New macro. + (OPCODE_LIS_HI): New macro. + (__elf_machine_runtime_setup): Change PLT code-generation scheme + for thread safety even with very large PLTs, better efficiency, + and to fix a cache-flushing bug. Also support the Motorola + 8xx processors which have a different cache line size than all + the others. + (__elf_machine_fixup_plt): Likewise. + (__process_machine_rela): Don't use elf_machine_fixup_plt. + 1999-12-30 Ulrich Drepper <drepper@cygnus.com> * wcsmbs/wcscoll.c: Use multibyte character version. |