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author | Paul Clarke <pc@us.ibm.com> | 2017-10-18 12:02:02 -0200 |
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committer | Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com> | 2017-10-18 12:08:28 -0200 |
commit | 346729f66b905344e4ce24045489d189e5b4a9b8 (patch) | |
tree | 8e92fa68cb649020822e10b07183d00bc51889cd /ChangeLog | |
parent | 508b1e71a37355839ab91f9c09ce7e577cf69a58 (diff) | |
download | glibc-346729f66b905344e4ce24045489d189e5b4a9b8.tar.gz glibc-346729f66b905344e4ce24045489d189e5b4a9b8.tar.xz glibc-346729f66b905344e4ce24045489d189e5b4a9b8.zip |
powerpc: fix check-before-set in SET_RESTORE_ROUND
A performance regression was introduced by commit 84d74e427a771906830800e574a72f8d25a954b8 "powerpc: Cleanup fenv_private.h". In the powerpc implementation of SET_RESTORE_ROUND, there is the following code in the "SET" function (slightly simplified): -- old.fenv = fegetenv_register (); new.l = (old.l & _FPU_MASK_TRAPS_RN) | r; (1) if (new.l != old.l) (2) { if ((old.l & _FPU_ALL_TRAPS) != 0) (void) __fe_mask_env (); fesetenv_register (new.fenv); (3) -- Line (1) sets the value of "new" to the current value of FPSCR, but masks off summary bits, exceptions, non-IEEE mode, and rounding mode, then ORs in the new rounding mode. Line (2) compares this new value to the current value in order to avoid setting a new value in the FPSCR (line (3)) unless something significant has changed (exception enables or rounding mode). The summary bits are not germane to the comparison, but are cleared in "new" and preserved in "old", resulting in false negative comparisons, and unnecessarily setting the FPSCR in those cases with associated negative performance impacts. The solution is to treat the summaries identically for "new" and "old": - save them in SET - leave them alone otherwise - restore the saved values in RESTORE Also minor changes: - expand _FPU_MASK_RN to 64bit hex, to match other MASKs - treat bit 52 (left-to-right) as reserved (since it is) * sysdeps/powerpc/fpu/fenv_private.h (_FPU_MASK_TRAPS_RN): (_FPU_MASK_FRAC_INEX_RET_CC): Fix masks to more properly handle summary bits. (_FPU_MASK_RN): Expand _FPU_MASK_RN to 64bit hex. (_FPU_MASK_NOT_RN_NI): Treat bit 52 (left-to-right) as reserved. Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>
Diffstat (limited to 'ChangeLog')
-rw-r--r-- | ChangeLog | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog index 2ed83186f9..a34405285f 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,11 @@ +2017-10-18 Paul A. Clarke <pc@us.ibm.com> + + * sysdeps/powerpc/fpu/fenv_private.h (_FPU_MASK_TRAPS_RN): + (_FPU_MASK_FRAC_INEX_RET_CC): Fix masks to more properly handle + summary bits. + (_FPU_MASK_RN): Expand _FPU_MASK_RN to 64bit hex. + (_FPU_MASK_NOT_RN_NI): Treat bit 52 (left-to-right) as reserved. + 2017-10-18 Mike FABIAN <mfabian@redhat.com> [BZ #16777] |