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authorPaul A. Clarke <pc@us.ibm.com>2019-08-06 00:13:45 -0400
committerPaul A. Clarke <pc@us.ibm.com>2019-08-28 13:52:17 -0500
commitfec2bd2c2d31bc731cf61623e150d047746954bd (patch)
tree08a770e031939d3c1b4bed81b88ed7a0071ba456 /ChangeLog
parente905212627350d54b58426214b5a54ddc852b0c9 (diff)
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[powerpc] fesetenv: optimize FPSCR access
fesetenv() reads the current value of the Floating-Point Status and Control
Register (FPSCR) to determine the difference between the current state of
exception enables and the newly requested state.  All of these bits are also
returned by the lighter weight 'mffsl' instruction used by fegetenv_status().
Use that instead.

Also, remove a local macro _FPU_MASK_ALL in favor of a common macro,
FPU_ENABLES_MASK from fenv_libc.h.

Finally, use a local variable ('new') in favor of a pointer dereference
('*envp').
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@@ -1,5 +1,11 @@
 2019-08-28  Paul A. Clarke  <pc@us.ibm.com>
     
+    	* sysdeps/powerpc/fpu/fesetenv.c (__fesetenv):  Utilize lightweight
+    	FPSCR read.
+    	(_FPU_MASK_ALL):  Delete.
+
+2019-08-28  Paul A. Clarke  <pc@us.ibm.com>
+    
     	* sysdeps/powerpc/fpu/fenv_private.h (libc_feholdsetround_ppc_ctx):
     	Utilize lightweight FPSCR read if possible, set fewer FPSCR bits
     	if possible.