about summary refs log tree commit diff
path: root/ChangeLog
diff options
context:
space:
mode:
authorPaul Murphy <murphyp@linux.vnet.ibm.com>2016-06-10 14:50:32 -0500
committerTulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>2016-10-21 16:40:03 -0200
commit84d74e427a771906830800e574a72f8d25a954b8 (patch)
tree9574218747cd3569847507e3714e4ff38cbac897 /ChangeLog
parentb3918c44db615637b26d919ce599cd86592316b3 (diff)
downloadglibc-84d74e427a771906830800e574a72f8d25a954b8.tar.gz
glibc-84d74e427a771906830800e574a72f8d25a954b8.tar.xz
glibc-84d74e427a771906830800e574a72f8d25a954b8.zip
powerpc: Cleanup fenv_private.h
Some of the masks are wrong, and the naming is confusing.

There are two basic cases we really care about:

1. Stacking a new rounding mode when running certain
   sections of code, and pausing exception handling.

2. Likewise, but discarding any exceptions which occur
   while running under the new rounding mode.

libc_feholdexcept_setround_ppc_ctx has been removed as it basically
does the same thing as libc_feholdsetround_ppc_ctx but also clearing
any sticky bits.  The restore behavior is what differentiates these
two cases as the SET_RESTORE_ROUND{,_NOEX} macros will either merge
or discard all exceptions occurring during scope of their usage.

Likewise, there are a number of routines to swap, replace,
or merge FP environments.  This change reduces much of
the common and sometimes wrong code.

Tested on ppc64le, with results before and after.
Diffstat (limited to 'ChangeLog')
-rw-r--r--ChangeLog42
1 files changed, 42 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog
index 742aa8cdaf..d2b0b76578 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,45 @@
+2016-10-21  Paul E. Murphy  <murphyp@linux.vnet.ibm.com>
+
+	* sysdeps/powerpc/fpu/fenv_private.h:
+	(_FPU_MASK_ALL): Rename to...
+	(_FPU_ALL_TRAPS): New macro representing ISA VE OE UE ZE and
+	XE FPSCR bits.
+
+	(_FPU_MASK_RN): New macro to mask out ISA RN bits in FPSCR.
+
+	(_FPU_MASK_ROUNDING): Rename to...
+	(_FPU_MASK_NOT_RN_NI): New macro to mask out all but ISA RN and
+	NI bits.
+
+	(_FPU_MASK_EXCEPT_ROUND): Rename to...
+	(_FPU_MASK_TRAPS_RN): New macro to mask out exception enable
+	bits and rounding bits.
+
+	(__libc_feholdbits_ppc): New inline function to mask, set,
+	and pontentially clear FSPCR bits, and change MSR[FE] bits.
+	(libc_feholdexcept_ppc): Redefine using __libc_feholdbits_ppc.
+	(libc_feholdexcept_setround_ppc): Likewise.
+
+	(__libc_femergeenv_ppc): New function to dynamically mask both
+	old and new FP environments and merge.
+	(libc_fesetenv_ppc): Redefine in terms of __libc_femergeenv_ppc.
+	(libc_feresetround_ppc): Likewise.
+	(libc_feupdateenv_test_ppc): Likewise.
+	(libc_feupdateenv_ppc): Likewise.
+
+	(libc_feholdsetround_ppc_ctx): Fix usage to include masking
+	of ISA RN bits, and update macro names.
+	(libc_feholdexcept_setround_ppc_ctx): Remove as it is
+	effectively the same as the previously mentioned function.
+
+	(libc_feupdateenv_ppc_ctx): Replace libc_feupdatedenv_test_ppc
+	usage with fe_resetround_ppc.
+
+	(libc_feholdexcept_setround_ctx): Remove, this doesn't appear
+	to be used.
+	(libc_feholdexcept_setround_ctxf): Likewise.
+	(libc_feholdexcept_setround_ctxl): Likewise.
+
 2016-10-21  Florian Weimer  <fweimer@redhat.com>
 
 	[BZ #20715]