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author | H.J. Lu <hjl.tools@gmail.com> | 2016-04-01 10:00:01 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2016-04-01 10:00:12 -0700 |
commit | 344303f3cfc072469c7c32de90952871c108afd5 (patch) | |
tree | 0ec61ee834a4cf6c2b540c07f78cede7dda54937 /ChangeLog | |
parent | aea44bf61aa3f27acbdb7648b6f5dc8882a8987b (diff) | |
download | glibc-344303f3cfc072469c7c32de90952871c108afd5.tar.gz glibc-344303f3cfc072469c7c32de90952871c108afd5.tar.xz glibc-344303f3cfc072469c7c32de90952871c108afd5.zip |
Test 64-byte alignment in memset benchtest
Add 64-byte alignment tests in memset benchtest for 64-byte vector registers. * benchtests/bench-memset.c (do_test): Support 64-byte alignment. (test_main): Test 64-byte alignment.
Diffstat (limited to 'ChangeLog')
-rw-r--r-- | ChangeLog | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog index 160777ad65..fc86116912 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,5 +1,11 @@ 2016-04-01 H.J. Lu <hongjiu.lu@intel.com> + * benchtests/bench-memset.c (do_test): Support 64-byte + alignment. + (test_main): Test 64-byte alignment. + +2016-04-01 H.J. Lu <hongjiu.lu@intel.com> + * benchtests/bench-memmove.c (test_main): Test 64-byte alignment. |