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authorAdhemerval Zanella <azanella@linux.vnet.ibm.com>2014-02-17 10:44:08 -0600
committerAdhemerval Zanella <azanella@linux.vnet.ibm.com>2014-02-27 12:58:33 -0600
commitfe13a20c37578f08ce393ccaeb45caeb48815ca5 (patch)
tree62a09dac1baf2a1caf2e8b346733645cc596340f /ChangeLog
parent1ad8950a3ea4056ed343d681b5146f4b4aa27e10 (diff)
downloadglibc-fe13a20c37578f08ce393ccaeb45caeb48815ca5.tar.gz
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PowerPC: llround/llroundf POWER8 optimization
This patch add a optimized llround/llroundf implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
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 2014-02-27  Adhemerval Zanella  <azanella@linux.vnet.ibm.com>
 
+	* sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile: Add llround power8
+	implementation.
+	* sysdeps/powerpc/powerpc64/fpu/multiarch/s_llround-power8.S: New file:
+	POWER8 llround ifunc implementation.
+	* sysdeps/powerpc/powerpc64/fpu/multiarch/s_llround.c (__lllround): Add
+	POWER8 implementation.
+	* sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S: New file:
+	POWER8 llround implementation.
+
+2014-02-27  Adhemerval Zanella  <azanella@linux.vnet.ibm.com>
+
 	* sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile: Add llrint power8
 	implementation.
 	* sysdeps/powerpc/powerpc64/fpu/multiarch/s_llrint-power8.S: New file: