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| author | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-02-27 09:46:46 -0600 |
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| committer | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-02-27 12:58:33 -0600 |
| commit | cac626d60a863e48ab75417064984769e58c5719 (patch) | |
| tree | 72cfaf38f3f0ae48808e8a088526c12592dc2feb /ChangeLog.5 | |
| parent | 4393fc119c34e97519b9b7a4fc94066b283be452 (diff) | |
| download | glibc-cac626d60a863e48ab75417064984769e58c5719.tar.gz glibc-cac626d60a863e48ab75417064984769e58c5719.tar.xz glibc-cac626d60a863e48ab75417064984769e58c5719.zip | |
PowerPC: Optimized finite/finitef for POWER8
This patch add a optimized finite/finitef implementation for POWER8 using the new Move From VSR Doubleword instruction to gains some cycles from FP to GRP register move.
Diffstat (limited to 'ChangeLog.5')
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