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| author | Wilco <wdijkstr@arm.com> | 2014-06-24 12:04:27 +0000 |
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| committer | Wilco <wdijkstr@arm.com> | 2014-06-24 12:04:27 +0000 |
| commit | 001f7b773c637560ecfa686452a5e68d60d07db3 (patch) | |
| tree | 08bd670c6b892304a287c56f6cbeb00e92276567 /ChangeLog.16 | |
| parent | 4841e6a6c2fa691201fb52dfaf6b6a8920229bac (diff) | |
| download | glibc-001f7b773c637560ecfa686452a5e68d60d07db3.tar.gz glibc-001f7b773c637560ecfa686452a5e68d60d07db3.tar.xz glibc-001f7b773c637560ecfa686452a5e68d60d07db3.zip | |
Speed up the ARM fenv implementation by avoiding unnecessary FPSCR
writes if the FPSCR remains unchanged. 2014-06-24 Wilco <wdijkstr@arm.com> * sysdeps/arm/fclrexcpt.c (feclearexcept): Optimize to avoid unnecessary FPSCR writes. * sysdeps/arm/fedisblxcpt.c (fedisableexcept): Likewise. * sysdeps/arm/feenablxcpt.c (feenableexcept): Likewise. * sysdeps/arm/fsetexcptflg.c (fesetexceptflag): Likewise. * sysdeps/arm/setfpucw.c (__setfpucw): Likewise.
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