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authorAlistair Francis <alistair.francis@wdc.com>2020-07-14 06:29:56 -0700
committerAlistair Francis <alistair.francis@wdc.com>2020-08-27 08:17:44 -0700
commit389f6854eb43d892cca69f8b3bfaf813e0516127 (patch)
tree6b1b8e065d8c8d21cbff20816a4891a963ae4224
parent72dfddeffcc993a726bdcbe5e515afa1180095e8 (diff)
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Documentation for the RISC-V 32-bit port
There is already RISC-V 64-bit port information in the documentation.
Let's add some documentation entries for the RISC-V 32-bit as well.

Reviewed-by: Maciej W. Rozycki <macro@wdc.com>
-rw-r--r--NEWS11
-rw-r--r--README1
2 files changed, 11 insertions, 1 deletions
diff --git a/NEWS b/NEWS
index 2937adc3f3..06e43e0453 100644
--- a/NEWS
+++ b/NEWS
@@ -9,7 +9,16 @@ Version 2.33
 
 Major new features:
 
-  [Add new features here]
+
+* Support for the RISC-V ISA running on Linux has been expanded to run on
+  32-bit hardware.  This is supported for the following ISA and ABI pairs:
+
+    - rv32imac ilp32
+    - rv32imafdc ilp32
+    - rv32imafdc ilp32d
+
+  The 32-bit RISC-V port requires at least Linux 5.4, GCC 7.1 and binutils
+  2.28.
 
 Deprecated and removed features, and other changes affecting compatibility:
 
diff --git a/README b/README
index 903f07e484..d0f0edb393 100644
--- a/README
+++ b/README
@@ -39,6 +39,7 @@ The GNU C Library supports these configurations for using Linux kernels:
 	powerpc64*-*-linux-gnu	Big-endian and little-endian.
 	s390-*-linux-gnu
 	s390x-*-linux-gnu
+	riscv32-*-linux-gnu
 	riscv64-*-linux-gnu
 	sh[34]-*-linux-gnu
 	sparc*-*-linux-gnu