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| author | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2012-01-27 18:05:45 -0500 |
|---|---|---|
| committer | Ulrich Drepper <drepper@gmail.com> | 2012-01-27 18:05:45 -0500 |
| commit | d73f93a4613a7deb35abd2de4c8df7378d81ee8f (patch) | |
| tree | 92e0b433ea39eb4d36ac04908be4cad236aad4e1 | |
| parent | cdd9b365f92e0f30d64094a8400dec2a7e494110 (diff) | |
| download | glibc-d73f93a4613a7deb35abd2de4c8df7378d81ee8f.tar.gz glibc-d73f93a4613a7deb35abd2de4c8df7378d81ee8f.tar.xz glibc-d73f93a4613a7deb35abd2de4c8df7378d81ee8f.zip | |
PowerPC - A2 memcpy cache line size initialization
| -rw-r--r-- | ChangeLog | 6 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc32/a2/memcpy.S | 25 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc64/a2/memcpy.S | 30 |
3 files changed, 57 insertions, 4 deletions
diff --git a/ChangeLog b/ChangeLog index 93d33c0d8e..fcec884023 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,9 @@ +2012-01-19 Adhemerval Zanella <azanella@linux.vnet.ibm.com> + + * sysdeps/powerpc/powerpc32/a2/memcpy.S: Fix for when cache line + size is not set. + * sysdeps/powerpc/powerpc64/a2/memcpy.S: Likewise. + 2012-01-27 Ulrich Drepper <drepper@gmail.com> [BZ #13618] diff --git a/sysdeps/powerpc/powerpc32/a2/memcpy.S b/sysdeps/powerpc/powerpc32/a2/memcpy.S index f4c3c18414..0e9d18e085 100644 --- a/sysdeps/powerpc/powerpc32/a2/memcpy.S +++ b/sysdeps/powerpc/powerpc32/a2/memcpy.S @@ -1,5 +1,5 @@ /* Optimized memcpy implementation for PowerPC A2. - Copyright (C) 2010, 2011 Free Software Foundation, Inc. + Copyright (C) 2010, 2011, 2012 Free Software Foundation, Inc. Contributed by Michael Brutman <brutman@us.ibm.com>. This file is part of the GNU C Library. @@ -126,8 +126,29 @@ L(dst_aligned): cmplwi cr5, r9, 0 bne+ cr5,L(cachelineset) - li r9,64 +/* __cache_line_size not set: generic byte copy without much optimization */ + andi. r0,r5,1 /* If length is odd copy one byte. */ + beq L(cachelinenotset_align) + lbz r7,0(r4) /* Read one byte from source. */ + addi r5,r5,-1 /* Update length. */ + addi r4,r4,1 /* Update source pointer address. */ + stb r7,0(r6) /* Store one byte on dest. */ + addi r6,r6,1 /* Update dest pointer address. */ +L(cachelinenotset_align): + cmpwi cr7,r5,0 /* If length is 0 return. */ + beqlr cr7 + ori r2,r2,0 /* Force a new dispatch group. */ +L(cachelinenotset_loop): + addic. r5,r5,-2 /* Update length. */ + lbz r7,0(r4) /* Load 2 bytes from source. */ + lbz r8,1(r4) + addi r4,r4,2 /* Update source pointer address. */ + stb r7,0(r6) /* Store 2 bytes on dest. */ + stb r8,1(r6) + addi r6,r6,2 /* Update dest pointer address. */ + bne L(cachelinenotset_loop) + blr L(cachelineset): diff --git a/sysdeps/powerpc/powerpc64/a2/memcpy.S b/sysdeps/powerpc/powerpc64/a2/memcpy.S index ac95171aa8..f0c17ce032 100644 --- a/sysdeps/powerpc/powerpc64/a2/memcpy.S +++ b/sysdeps/powerpc/powerpc64/a2/memcpy.S @@ -1,5 +1,5 @@ /* Optimized memcpy implementation for PowerPC A2. - Copyright (C) 2010 Free Software Foundation, Inc. + Copyright (C) 2010,2012 Free Software Foundation, Inc. Contributed by Michael Brutman <brutman@us.ibm.com>. This file is part of the GNU C Library. @@ -117,9 +117,35 @@ EALIGN (BP_SYM (memcpy), 5, 0) .align 4 L(dst_aligned): + cmpdi cr0,r9,0 /* Cache line size set? */ + bne+ cr0,L(cachelineset) + +/* __cache_line_size not set: generic byte copy without much optimization */ + clrldi. r0,r5,63 /* If length is odd copy one byte */ + beq L(cachelinenotset_align) + lbz r7,0(r4) /* Read one byte from source */ + addi r5,r5,-1 /* Update length */ + addi r4,r4,1 /* Update source pointer address */ + stb r7,0(r6) /* Store one byte at dest */ + addi r6,r6,1 /* Update dest pointer address */ +L(cachelinenotset_align): + cmpdi cr7,r5,0 /* If length is 0 return */ + beqlr cr7 + ori r2,r2,0 /* Force a new dispatch group */ +L(cachelinenotset_loop): + addic. r5,r5,-2 /* Update length */ + lbz r7,0(r4) /* Load 2 bytes from source */ + lbz r8,1(r4) + addi r4,r4,2 /* Update source pointer address */ + stb r7,0(r6) /* Store 2 bytes on dest */ + stb r8,1(r6) + addi r6,r6,2 /* Update dest pointer address */ + bne L(cachelinenotset_loop) + blr - cmpd cr5,r5,r10 /* Less than a cacheline to go? */ +L(cachelineset): + cmpd cr5,r5,r10 /* Less than a cacheline to go? */ neg r7,r6 /* How far to next cacheline bdy? */ |