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author | Noah Goldstein <goldstein.w.n@gmail.com> | 2023-07-18 10:27:59 -0500 |
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committer | Noah Goldstein <goldstein.w.n@gmail.com> | 2023-09-11 22:47:08 -0500 |
commit | 6c8475a3f745afd08721d3cf33c25a175aee6d0a (patch) | |
tree | 17623c61023d726d88b0347751098ead11218c9f | |
parent | 31b06441f9f82be270b3fe486eaa76bd1d866477 (diff) | |
download | glibc-6c8475a3f745afd08721d3cf33c25a175aee6d0a.tar.gz glibc-6c8475a3f745afd08721d3cf33c25a175aee6d0a.tar.xz glibc-6c8475a3f745afd08721d3cf33c25a175aee6d0a.zip |
x86: Use `3/4*sizeof(per-thread-L3)` as low bound for NT threshold.
On some machines we end up with incomplete cache information. This can make the new calculation of `sizeof(total-L3)/custom-divisor` end up lower than intended (and lower than the prior value). So reintroduce the old bound as a lower bound to avoid potentially regressing code where we don't have complete information to make the decision. Reviewed-by: DJ Delorie <dj@redhat.com> (cherry picked from commit 8b9a0af8ca012217bf90d1dc0694f85b49ae09da)
-rw-r--r-- | sysdeps/x86/dl-cacheinfo.h | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/sysdeps/x86/dl-cacheinfo.h b/sysdeps/x86/dl-cacheinfo.h index c885b23f7a..c35bf73467 100644 --- a/sysdeps/x86/dl-cacheinfo.h +++ b/sysdeps/x86/dl-cacheinfo.h @@ -872,12 +872,21 @@ dl_init_cacheinfo (struct cpu_features *cpu_features) provides proper LRU hints so that the maximum thrashing capped at 1/associativity. */ unsigned long int non_temporal_threshold = shared / 4; + + /* If the computed non_temporal_threshold <= 3/4 * per-thread L3, we most + likely have incorrect/incomplete cache info in which case, default to + 3/4 * per-thread L3 to avoid regressions. */ + unsigned long int non_temporal_threshold_lowbound + = shared_per_thread * 3 / 4; + if (non_temporal_threshold < non_temporal_threshold_lowbound) + non_temporal_threshold = non_temporal_threshold_lowbound; + /* If no ERMS, we use the per-thread L3 chunking. Normal cacheable stores run a higher risk of actually thrashing the cache as they don't have a HW LRU hint. As well, their performance in highly parallel situations is noticeably worse. */ if (!CPU_FEATURE_USABLE_P (cpu_features, ERMS)) - non_temporal_threshold = shared_per_thread * 3 / 4; + non_temporal_threshold = non_temporal_threshold_lowbound; #if HAVE_TUNABLES /* NB: The REP MOVSB threshold must be greater than VEC_SIZE * 8. */ |