diff options
| author | Joseph Myers <joseph@codesourcery.com> | 2016-05-24 21:11:18 +0000 |
|---|---|---|
| committer | Joseph Myers <joseph@codesourcery.com> | 2016-05-24 21:11:18 +0000 |
| commit | 5ff81530dd14552a48a8fcb119e5867a1b504cc6 (patch) | |
| tree | cea85f8f7867675eda9708b762ca2b8ab1ebbc52 | |
| parent | 7cfcb778c9cc6ad3c3b5ac2dbb2308e81ba3235b (diff) | |
| download | glibc-5ff81530dd14552a48a8fcb119e5867a1b504cc6.tar.gz glibc-5ff81530dd14552a48a8fcb119e5867a1b504cc6.tar.xz glibc-5ff81530dd14552a48a8fcb119e5867a1b504cc6.zip | |
Do not raise "inexact" from x86_64 SSE4.1 ceil, floor (bug 15479).
Continuing fixes for ceil and floor functions not to raise the "inexact" exception, this patch fixes the x86_64 SSE4.1 versions. The roundss / roundsd instructions take an immediate operand that determines the rounding mode and whether to raise "inexact"; this just needs bit 3 set to disable "inexact", which this patch does. Remark: we don't have an SSE4.1 version of trunc / truncf (using this instruction with operand 11); I'd expect one to make sense, but of course it should be benchmarked against the existing C code. I'll file a bug in Bugzilla for the lack of such a version. Tested for x86_64. [BZ #15479] * sysdeps/x86_64/fpu/multiarch/s_ceil.S (__ceil_sse41): Set bit 3 of immediate operand to rounding instruction. * sysdeps/x86_64/fpu/multiarch/s_ceilf.S (__ceilf_sse41): Likewise. * sysdeps/x86_64/fpu/multiarch/s_floor.S (__floor_sse41): Likewise. * sysdeps/x86_64/fpu/multiarch/s_floorf.S (__floorf_sse41): Likewise.
| -rw-r--r-- | ChangeLog | 12 | ||||
| -rw-r--r-- | sysdeps/x86_64/fpu/multiarch/s_ceil.S | 2 | ||||
| -rw-r--r-- | sysdeps/x86_64/fpu/multiarch/s_ceilf.S | 2 | ||||
| -rw-r--r-- | sysdeps/x86_64/fpu/multiarch/s_floor.S | 2 | ||||
| -rw-r--r-- | sysdeps/x86_64/fpu/multiarch/s_floorf.S | 2 |
5 files changed, 16 insertions, 4 deletions
diff --git a/ChangeLog b/ChangeLog index f327aa8a9f..8f119fa949 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,15 @@ +2016-05-24 Joseph Myers <joseph@codesourcery.com> + + [BZ #15479] + * sysdeps/x86_64/fpu/multiarch/s_ceil.S (__ceil_sse41): Set bit 3 + of immediate operand to rounding instruction. + * sysdeps/x86_64/fpu/multiarch/s_ceilf.S (__ceilf_sse41): + Likewise. + * sysdeps/x86_64/fpu/multiarch/s_floor.S (__floor_sse41): + Likewise. + * sysdeps/x86_64/fpu/multiarch/s_floorf.S (__floorf_sse41): + Likewise. + 2016-05-24 Paul E. Murphy <murphyp@linux.vnet.ibm.com> * math/libm-test.inc (MIN_EXP): Directly define as diff --git a/sysdeps/x86_64/fpu/multiarch/s_ceil.S b/sysdeps/x86_64/fpu/multiarch/s_ceil.S index 40fa729955..f2ca31e5fa 100644 --- a/sysdeps/x86_64/fpu/multiarch/s_ceil.S +++ b/sysdeps/x86_64/fpu/multiarch/s_ceil.S @@ -33,6 +33,6 @@ weak_alias (__ceil, ceil) ENTRY(__ceil_sse41) - roundsd $2, %xmm0, %xmm0 + roundsd $10, %xmm0, %xmm0 ret END(__ceil_sse41) diff --git a/sysdeps/x86_64/fpu/multiarch/s_ceilf.S b/sysdeps/x86_64/fpu/multiarch/s_ceilf.S index 9a06a5c174..e7a7b3a470 100644 --- a/sysdeps/x86_64/fpu/multiarch/s_ceilf.S +++ b/sysdeps/x86_64/fpu/multiarch/s_ceilf.S @@ -33,6 +33,6 @@ weak_alias (__ceilf, ceilf) ENTRY(__ceilf_sse41) - roundss $2, %xmm0, %xmm0 + roundss $10, %xmm0, %xmm0 ret END(__ceilf_sse41) diff --git a/sysdeps/x86_64/fpu/multiarch/s_floor.S b/sysdeps/x86_64/fpu/multiarch/s_floor.S index 57a0eee5ba..19c0d44001 100644 --- a/sysdeps/x86_64/fpu/multiarch/s_floor.S +++ b/sysdeps/x86_64/fpu/multiarch/s_floor.S @@ -33,6 +33,6 @@ weak_alias (__floor, floor) ENTRY(__floor_sse41) - roundsd $1, %xmm0, %xmm0 + roundsd $9, %xmm0, %xmm0 ret END(__floor_sse41) diff --git a/sysdeps/x86_64/fpu/multiarch/s_floorf.S b/sysdeps/x86_64/fpu/multiarch/s_floorf.S index 74a149a950..96f51b6399 100644 --- a/sysdeps/x86_64/fpu/multiarch/s_floorf.S +++ b/sysdeps/x86_64/fpu/multiarch/s_floorf.S @@ -33,6 +33,6 @@ weak_alias (__floorf, floorf) ENTRY(__floorf_sse41) - roundss $1, %xmm0, %xmm0 + roundss $9, %xmm0, %xmm0 ret END(__floorf_sse41) |