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| author | H.J. Lu <hjl.tools@gmail.com> | 2023-04-05 09:21:33 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2023-04-05 14:46:10 -0700 |
| commit | 231bf916ce9572776df0b5f197b57739c1ddc7ac (patch) | |
| tree | cdcdb062f6a5a138d303e7d8dcf07d0d11a14824 | |
| parent | fb90dc8513f67d1cc0578452aee3459e9b9ab626 (diff) | |
| download | glibc-231bf916ce9572776df0b5f197b57739c1ddc7ac.tar.gz glibc-231bf916ce9572776df0b5f197b57739c1ddc7ac.tar.xz glibc-231bf916ce9572776df0b5f197b57739c1ddc7ac.zip | |
<sys/platform/x86.h>: Add RAO-INT support
Add RAO-INT support to <sys/platform/x86.h>. Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
| -rw-r--r-- | manual/platform.texi | 3 | ||||
| -rw-r--r-- | sysdeps/x86/bits/platform/x86.h | 1 | ||||
| -rw-r--r-- | sysdeps/x86/cpu-features.c | 1 | ||||
| -rw-r--r-- | sysdeps/x86/include/cpu-features.h | 3 | ||||
| -rw-r--r-- | sysdeps/x86/tst-get-cpu-features.c | 2 |
5 files changed, 10 insertions, 0 deletions
diff --git a/manual/platform.texi b/manual/platform.texi index b72518ebd8..a6e33b1572 100644 --- a/manual/platform.texi +++ b/manual/platform.texi @@ -517,6 +517,9 @@ extended state management using XSAVE/XRSTOR. @code{PTWRITE} -- PTWRITE instruction. @item +@code{RAO_INT} -- RAO-INT instructions. + +@item @code{RDPID} -- RDPID instruction. @item diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h index 1040c2aed4..6fc3b69651 100644 --- a/sysdeps/x86/bits/platform/x86.h +++ b/sysdeps/x86/bits/platform/x86.h @@ -288,6 +288,7 @@ enum = (CPUID_INDEX_7_ECX_1 * 8 * 4 * sizeof (unsigned int) + cpuid_register_index_eax * 8 * sizeof (unsigned int)), + x86_cpu_RAO_INT = x86_cpu_index_7_ecx_1_eax + 3, x86_cpu_AVX_VNNI = x86_cpu_index_7_ecx_1_eax + 4, x86_cpu_AVX512_BF16 = x86_cpu_index_7_ecx_1_eax + 5, x86_cpu_FZLRM = x86_cpu_index_7_ecx_1_eax + 10, diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 95ad48b501..e591e55a88 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -99,6 +99,7 @@ update_active (struct cpu_features *cpu_features) CPU_FEATURE_SET_ACTIVE (cpu_features, TBM); CPU_FEATURE_SET_ACTIVE (cpu_features, RDTSCP); CPU_FEATURE_SET_ACTIVE (cpu_features, WBNOINVD); + CPU_FEATURE_SET_ACTIVE (cpu_features, RAO_INT); CPU_FEATURE_SET_ACTIVE (cpu_features, FZLRM); CPU_FEATURE_SET_ACTIVE (cpu_features, FSRS); CPU_FEATURE_SET_ACTIVE (cpu_features, FSRCS); diff --git a/sysdeps/x86/include/cpu-features.h b/sysdeps/x86/include/cpu-features.h index fa91a23129..b946a88ad1 100644 --- a/sysdeps/x86/include/cpu-features.h +++ b/sysdeps/x86/include/cpu-features.h @@ -302,6 +302,7 @@ enum /* CPUID_INDEX_7_ECX_1. */ /* EAX. */ +#define bit_cpu_RAO_INT (1u << 3) #define bit_cpu_AVX_VNNI (1u << 4) #define bit_cpu_AVX512_BF16 (1u << 5) #define bit_cpu_FZLRM (1u << 10) @@ -537,6 +538,7 @@ enum /* CPUID_INDEX_7_ECX_1. */ /* EAX. */ +#define index_cpu_RAO_INT CPUID_INDEX_7_ECX_1 #define index_cpu_AVX_VNNI CPUID_INDEX_7_ECX_1 #define index_cpu_AVX512_BF16 CPUID_INDEX_7_ECX_1 #define index_cpu_FZLRM CPUID_INDEX_7_ECX_1 @@ -772,6 +774,7 @@ enum /* CPUID_INDEX_7_ECX_1. */ /* EAX. */ +#define reg_RAO_INT eax #define reg_AVX_VNNI eax #define reg_AVX512_BF16 eax #define reg_FZLRM eax diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c index cfc8692392..6a3f29db98 100644 --- a/sysdeps/x86/tst-get-cpu-features.c +++ b/sysdeps/x86/tst-get-cpu-features.c @@ -200,6 +200,7 @@ do_test (void) CHECK_CPU_FEATURE_PRESENT (XFD); CHECK_CPU_FEATURE_PRESENT (INVARIANT_TSC); CHECK_CPU_FEATURE_PRESENT (WBNOINVD); + CHECK_CPU_FEATURE_PRESENT (RAO_INT); CHECK_CPU_FEATURE_PRESENT (AVX_VNNI); CHECK_CPU_FEATURE_PRESENT (AVX512_BF16); CHECK_CPU_FEATURE_PRESENT (FZLRM); @@ -365,6 +366,7 @@ do_test (void) CHECK_CPU_FEATURE_ACTIVE (XFD); CHECK_CPU_FEATURE_ACTIVE (INVARIANT_TSC); CHECK_CPU_FEATURE_ACTIVE (WBNOINVD); + CHECK_CPU_FEATURE_ACTIVE (RAO_INT); CHECK_CPU_FEATURE_ACTIVE (AVX_VNNI); CHECK_CPU_FEATURE_ACTIVE (AVX512_BF16); CHECK_CPU_FEATURE_ACTIVE (FZLRM); |