diff options
author | Noah Goldstein <goldstein.w.n@gmail.com> | 2022-07-03 21:28:06 -0700 |
---|---|---|
committer | Noah Goldstein <goldstein.w.n@gmail.com> | 2022-07-05 16:42:42 -0700 |
commit | baeae86fb8ccd85b6bf9b5091884fa9b66d84a99 (patch) | |
tree | a44b748f00f026da4fc5a9444c323cdfc6d4d6e5 | |
parent | e070501d12b47e88c1ff8c313f887976fb578938 (diff) | |
download | glibc-baeae86fb8ccd85b6bf9b5091884fa9b66d84a99.tar.gz glibc-baeae86fb8ccd85b6bf9b5091884fa9b66d84a99.tar.xz glibc-baeae86fb8ccd85b6bf9b5091884fa9b66d84a99.zip |
x86: Add comment explaining no Slow_SSE4_2 check in ifunc-sse4_2
Just for clarities sake and so that if a future implementation is added we remember to add the check.
-rw-r--r-- | sysdeps/x86_64/multiarch/ifunc-sse4_2.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sysdeps/x86_64/multiarch/ifunc-sse4_2.h b/sysdeps/x86_64/multiarch/ifunc-sse4_2.h index ee36525bcf..f8b56936ec 100644 --- a/sysdeps/x86_64/multiarch/ifunc-sse4_2.h +++ b/sysdeps/x86_64/multiarch/ifunc-sse4_2.h @@ -27,6 +27,12 @@ IFUNC_SELECTOR (void) { const struct cpu_features* cpu_features = __get_cpu_features (); + /* This function uses the `pcmpstri` sse4.2 instruction which can be + slow on some CPUs. This normally would be guarded by a + Slow_SSE4_2 check, but since there is no other optimized + implementation its best to keep it regardless. If an optimized + fallback is added add a X86_ISA_CPU_FEATURE_ARCH_P (cpu_features, + Slow_SSE4_2) check. */ if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_2)) return OPTIMIZE (sse42); |