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| author | Aurelien Jarno <aurelien@aurel32.net> | 2016-08-02 09:18:59 +0200 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2016-12-08 00:56:55 -0500 |
| commit | 3eff6f84311d2679a58a637e3be78b4ced275762 (patch) | |
| tree | 7d25acf9d75b05f8942b173bcf3a095db228004c | |
| parent | 4b8790c81c1a7b870a43810ec95e08a2e501123d (diff) | |
| download | glibc-3eff6f84311d2679a58a637e3be78b4ced275762.tar.gz glibc-3eff6f84311d2679a58a637e3be78b4ced275762.tar.xz glibc-3eff6f84311d2679a58a637e3be78b4ced275762.zip | |
alpha: fix ceil on sNaN input
The alpha version of ceil wrongly return sNaN for sNaN input. Fix that by checking for NaN and by returning the input value added with itself in that case. Finally remove the code to handle inexact exception, ceil should never generate such an exception. Changelog: * sysdeps/alpha/fpu/s_ceil.c (__ceil): Add argument with itself when it is a NaN. [_IEEE_FP_INEXACT] Remove. * sysdeps/alpha/fpu/s_ceilf.c (__ceilf): Likewise. (cherry picked from commit 062e53c195b4a87754632c7d51254867247698b4)
| -rw-r--r-- | ChangeLog | 7 | ||||
| -rw-r--r-- | sysdeps/alpha/fpu/s_ceil.c | 7 | ||||
| -rw-r--r-- | sysdeps/alpha/fpu/s_ceilf.c | 7 |
3 files changed, 13 insertions, 8 deletions
diff --git a/ChangeLog b/ChangeLog index de93501270..927e1ae9b4 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,10 @@ +2016-08-02 Aurelien Jarno <aurelien@aurel32.net> + + * sysdeps/alpha/fpu/s_ceil.c (__ceil): Add argument with itself + when it is a NaN. + [_IEEE_FP_INEXACT] Remove. + * sysdeps/alpha/fpu/s_ceilf.c (__ceilf): Likewise. + 2016-11-30 H.J. Lu <hongjiu.lu@intel.com> [BZ #20495] diff --git a/sysdeps/alpha/fpu/s_ceil.c b/sysdeps/alpha/fpu/s_ceil.c index c1ff864d4b..e9c350af1c 100644 --- a/sysdeps/alpha/fpu/s_ceil.c +++ b/sysdeps/alpha/fpu/s_ceil.c @@ -26,17 +26,16 @@ double __ceil (double x) { + if (isnan (x)) + return x + x; + if (isless (fabs (x), 9007199254740992.0)) /* 1 << DBL_MANT_DIG */ { double tmp1, new_x; new_x = -x; __asm ( -#ifdef _IEEE_FP_INEXACT - "cvttq/svim %2,%1\n\t" -#else "cvttq/svm %2,%1\n\t" -#endif "cvtqt/m %1,%0\n\t" : "=f"(new_x), "=&f"(tmp1) : "f"(new_x)); diff --git a/sysdeps/alpha/fpu/s_ceilf.c b/sysdeps/alpha/fpu/s_ceilf.c index 7e63a6fe94..77e01a99f7 100644 --- a/sysdeps/alpha/fpu/s_ceilf.c +++ b/sysdeps/alpha/fpu/s_ceilf.c @@ -25,6 +25,9 @@ float __ceilf (float x) { + if (isnanf (x)) + return x + x; + if (isless (fabsf (x), 16777216.0f)) /* 1 << FLT_MANT_DIG */ { /* Note that Alpha S_Floating is stored in registers in a @@ -36,11 +39,7 @@ __ceilf (float x) new_x = -x; __asm ("cvtst/s %3,%2\n\t" -#ifdef _IEEE_FP_INEXACT - "cvttq/svim %2,%1\n\t" -#else "cvttq/svm %2,%1\n\t" -#endif "cvtqt/m %1,%0\n\t" : "=f"(new_x), "=&f"(tmp1), "=&f"(tmp2) : "f"(new_x)); |