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author | Aurelien Jarno <aurelien@aurel32.net> | 2016-08-02 09:18:59 +0200 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2016-12-08 00:56:59 -0500 |
commit | 1912cc082df4739c2388c375f8d486afdaa7d49b (patch) | |
tree | 88ae49676b8d1a3fd22664e41333cc90024a1cc1 | |
parent | 3eff6f84311d2679a58a637e3be78b4ced275762 (diff) | |
download | glibc-1912cc082df4739c2388c375f8d486afdaa7d49b.tar.gz glibc-1912cc082df4739c2388c375f8d486afdaa7d49b.tar.xz glibc-1912cc082df4739c2388c375f8d486afdaa7d49b.zip |
alpha: fix floor on sNaN input
The alpha version of floor wrongly return sNaN for sNaN input. Fix that by checking for NaN and by returning the input value added with itself in that case. Finally remove the code to handle inexact exception, floor should never generate such an exception. Changelog: * sysdeps/alpha/fpu/s_floor.c (__floor): Add argument with itself when it is a NaN. [_IEEE_FP_INEXACT] Remove. * sysdeps/alpha/fpu/s_floorf.c (__floorf): Likewise. (cherry picked from commit 65cc568cf57156e5230db9a061645e54ff028a41)
-rw-r--r-- | ChangeLog | 4 | ||||
-rw-r--r-- | sysdeps/alpha/fpu/s_floor.c | 7 | ||||
-rw-r--r-- | sysdeps/alpha/fpu/s_floorf.c | 7 |
3 files changed, 10 insertions, 8 deletions
diff --git a/ChangeLog b/ChangeLog index 927e1ae9b4..77204f41bc 100644 --- a/ChangeLog +++ b/ChangeLog @@ -4,6 +4,10 @@ when it is a NaN. [_IEEE_FP_INEXACT] Remove. * sysdeps/alpha/fpu/s_ceilf.c (__ceilf): Likewise. + * sysdeps/alpha/fpu/s_floor.c (__floor): Add argument with itself + when it is a NaN. + [_IEEE_FP_INEXACT] Remove. + * sysdeps/alpha/fpu/s_floorf.c (__floorf): Likewise. 2016-11-30 H.J. Lu <hongjiu.lu@intel.com> diff --git a/sysdeps/alpha/fpu/s_floor.c b/sysdeps/alpha/fpu/s_floor.c index 1a6f8c4617..9930f6be42 100644 --- a/sysdeps/alpha/fpu/s_floor.c +++ b/sysdeps/alpha/fpu/s_floor.c @@ -27,16 +27,15 @@ double __floor (double x) { + if (isnan (x)) + return x + x; + if (isless (fabs (x), 9007199254740992.0)) /* 1 << DBL_MANT_DIG */ { double tmp1, new_x; __asm ( -#ifdef _IEEE_FP_INEXACT - "cvttq/svim %2,%1\n\t" -#else "cvttq/svm %2,%1\n\t" -#endif "cvtqt/m %1,%0\n\t" : "=f"(new_x), "=&f"(tmp1) : "f"(x)); diff --git a/sysdeps/alpha/fpu/s_floorf.c b/sysdeps/alpha/fpu/s_floorf.c index 8cd80e2b42..015c04f40d 100644 --- a/sysdeps/alpha/fpu/s_floorf.c +++ b/sysdeps/alpha/fpu/s_floorf.c @@ -26,6 +26,9 @@ float __floorf (float x) { + if (isnanf (x)) + return x + x; + if (isless (fabsf (x), 16777216.0f)) /* 1 << FLT_MANT_DIG */ { /* Note that Alpha S_Floating is stored in registers in a @@ -36,11 +39,7 @@ __floorf (float x) float tmp1, tmp2, new_x; __asm ("cvtst/s %3,%2\n\t" -#ifdef _IEEE_FP_INEXACT - "cvttq/svim %2,%1\n\t" -#else "cvttq/svm %2,%1\n\t" -#endif "cvtqt/m %1,%0\n\t" : "=f"(new_x), "=&f"(tmp1), "=&f"(tmp2) : "f"(x)); |