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| author | Ulrich Drepper <drepper@gmail.com> | 2011-12-22 17:52:30 -0500 |
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| committer | Ulrich Drepper <drepper@gmail.com> | 2011-12-22 17:52:30 -0500 |
| commit | aed9d17150a0d7060ef4245ce0b9612496ef84c7 (patch) | |
| tree | 39fa87f399b091dedb00378fd97a8dd45498b24e | |
| parent | db910efdbdbdde9e7c0a33cb6f6fc9e91672d6f2 (diff) | |
| download | glibc-aed9d17150a0d7060ef4245ce0b9612496ef84c7.tar.gz glibc-aed9d17150a0d7060ef4245ce0b9612496ef84c7.tar.xz glibc-aed9d17150a0d7060ef4245ce0b9612496ef84c7.zip | |
Add feraiseexcept optimization for x86-32
| -rw-r--r-- | ChangeLog | 3 | ||||
| -rw-r--r-- | sysdeps/i386/fpu/bits/fenv.h | 40 |
2 files changed, 42 insertions, 1 deletions
diff --git a/ChangeLog b/ChangeLog index 7c79547d63..450d827490 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,5 +1,8 @@ 2011-12-22 Ulrich Drepper <drepper@gmail.com> + * sysdeps/i386/fpu/bits/fenv.h [__SSE_MATH__]: Add feraiseexcept + optimization. + [BZ #13185] * sysdeps/i386/fpu/fgetexcptflg.c (__fegetexceptflag): Also return SSE flags if possible. diff --git a/sysdeps/i386/fpu/bits/fenv.h b/sysdeps/i386/fpu/bits/fenv.h index ef3fcb3840..e11e83f3dc 100644 --- a/sysdeps/i386/fpu/bits/fenv.h +++ b/sysdeps/i386/fpu/bits/fenv.h @@ -1,4 +1,4 @@ -/* Copyright (C) 1997, 1998, 1999, 2000 Free Software Foundation, Inc. +/* Copyright (C) 1997, 1998, 1999, 2000, 2011 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -88,3 +88,41 @@ fenv_t; /* Floating-point environment where none of the exception is masked. */ # define FE_NOMASK_ENV ((__const fenv_t *) -2) #endif + + +#if defined __SSE_MATH__ && defined __USE_EXTERN_INLINES +__BEGIN_DECLS + +/* Optimized versions. */ +extern int __REDIRECT_NTH (__feraiseexcept_renamed, (int), feraiseexcept); +__extern_inline int +__NTH (feraiseexcept (int __excepts)) +{ + if (__builtin_constant_p (__excepts) + && (__excepts & ~(FE_INVALID | FE_DIVBYZERO)) == 0) + { + if ((FE_INVALID & __excepts) != 0) + { + /* One example of a invalid operation is 0.0 / 0.0. */ + float __f = 0.0; + + __asm__ __volatile__ ("divss %0, %0 " : : "x" (__f)); + (void) &__f; + } + if ((FE_DIVBYZERO & __excepts) != 0) + { + float __f = 1.0; + float __g = 0.0; + + __asm__ __volatile__ ("divss %1, %0" : : "x" (__f), "x" (__g)); + (void) &__f; + } + + return 0; + } + + return __feraiseexcept_renamed (__excepts); +} + +__END_DECLS +#endif |