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| author | H.J. Lu <hjl.tools@gmail.com> | 2015-01-23 18:52:45 -0800 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2015-01-23 18:52:45 -0800 |
| commit | 972af9e8ddd870cabf8aad39b28a6e352c9cc79c (patch) | |
| tree | 098dd2fbcca9ea99d23251af839c6b7f6d7ac164 | |
| parent | ede0236c867a28aaed941e7acac9b0a8d89c5acb (diff) | |
| download | glibc-972af9e8ddd870cabf8aad39b28a6e352c9cc79c.tar.gz glibc-972af9e8ddd870cabf8aad39b28a6e352c9cc79c.tar.xz glibc-972af9e8ddd870cabf8aad39b28a6e352c9cc79c.zip | |
Also treat model numbers 0x5a/0x5d as Silvermont
| -rw-r--r-- | ChangeLog | 3 | ||||
| -rw-r--r-- | sysdeps/x86_64/multiarch/init-arch.c | 2 |
2 files changed, 4 insertions, 1 deletions
diff --git a/ChangeLog b/ChangeLog index c199a5d938..d746e18d59 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,7 +1,8 @@ 2015-01-23 H.J. Lu <hongjiu.lu@intel.com> * sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features): - Treat model numbers 0x4a/0x4d as Intel Silvermont architecture. + Treat model numbers 0x4a/0x4d/0x5a/0x5d as Intel Silvermont + architecture. 2015-01-23 H.J. Lu <hongjiu.lu@intel.com> diff --git a/sysdeps/x86_64/multiarch/init-arch.c b/sysdeps/x86_64/multiarch/init-arch.c index ec71918b25..9299360612 100644 --- a/sysdeps/x86_64/multiarch/init-arch.c +++ b/sysdeps/x86_64/multiarch/init-arch.c @@ -81,6 +81,8 @@ __init_cpu_features (void) case 0x37: case 0x4a: case 0x4d: + case 0x5a: + case 0x5d: /* Unaligned load versions are faster than SSSE3 on Silvermont. */ #if index_Fast_Unaligned_Load != index_Prefer_PMINUB_for_stringop |