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authorH.J. Lu <hjl.tools@gmail.com>2017-08-15 14:04:59 -0700
committerH.J. Lu <hjl.tools@gmail.com>2017-08-15 14:05:14 -0700
commitf59f7adb4a00b7784cab1becdf257366104587b7 (patch)
tree42aeecf314d9c19ec4cbc16ed69a01f7475455fa
parent6b11a6ad714e7f2bb83556c77d2306e55a94ca54 (diff)
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x86-64: Align L(SP_RANGE)/L(SP_INF_0) to 8 bytes [BZ #21955]
sysdeps/x86_64/fpu/e_expf.S has

        lea     L(SP_RANGE)(%rip), %rdx /* load over/underflow bound */
        cmpl    (%rdx,%rax,4), %ecx     /* |x|<under/overflow bound ? */
...
        /* Here if |x| is Inf */
        lea     L(SP_INF_0)(%rip), %rdx /* depending on sign of x: */
        movss   (%rdx,%rax,4), %xmm0    /* return zero or Inf */
        ret
...
         .section .rodata.cst8,"aM",@progbits,8
...
        .p2align 2
L(SP_RANGE): /* single precision overflow/underflow bounds */
        .long   0x42b17217      /* if x>this bound, then result overflows */
        .long   0x42cff1b4      /* if x<this bound, then result underflows */
        .type L(SP_RANGE), @object
        ASM_SIZE_DIRECTIVE(L(SP_RANGE))

        .p2align 2
L(SP_INF_0):
        .long   0x7f800000      /* single precision Inf */
        .long   0               /* single precision zero */
        .type L(SP_INF_0), @object
        ASM_SIZE_DIRECTIVE(L(SP_INF_0))

Since L(SP_RANGE) and L(SP_INF_0) are in .rodata.cst8 section, they must
be aligned to 8 bytes.

	[BZ #21955]
	* sysdeps/x86_64/fpu/e_expf.S (L(SP_RANGE)): Aligned to 8 bytes.
	(L(SP_INF_0)): Likewise.
-rw-r--r--ChangeLog6
-rw-r--r--sysdeps/x86_64/fpu/e_expf.S4
2 files changed, 8 insertions, 2 deletions
diff --git a/ChangeLog b/ChangeLog
index a1fb5165c1..db3e4b3a92 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2017-08-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+	[BZ #21955]
+	* sysdeps/x86_64/fpu/e_expf.S (L(SP_RANGE)): Aligned to 8 bytes.
+	(L(SP_INF_0)): Likewise.
+
 2017-08-15  Florian Weimer  <fweimer@redhat.com>
 
 	* gmon/Makefile (tests-special): Add tst-gmon-prof only if
diff --git a/sysdeps/x86_64/fpu/e_expf.S b/sysdeps/x86_64/fpu/e_expf.S
index 4fd2bb1fb5..c3bf312c44 100644
--- a/sysdeps/x86_64/fpu/e_expf.S
+++ b/sysdeps/x86_64/fpu/e_expf.S
@@ -297,14 +297,14 @@ L(DP_P0): /* double precision polynomial coefficient P0 */
 	.type L(DP_P0), @object
 	ASM_SIZE_DIRECTIVE(L(DP_P0))
 
-	.p2align 2
+	.p2align 3
 L(SP_RANGE): /* single precision overflow/underflow bounds */
 	.long	0x42b17217	/* if x>this bound, then result overflows */
 	.long	0x42cff1b4	/* if x<this bound, then result underflows */
 	.type L(SP_RANGE), @object
 	ASM_SIZE_DIRECTIVE(L(SP_RANGE))
 
-	.p2align 2
+	.p2align 3
 L(SP_INF_0):
 	.long	0x7f800000	/* single precision Inf */
 	.long	0		/* single precision zero */