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author | H.J. Lu <hjl.tools@gmail.com> | 2016-04-15 05:22:53 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2016-06-06 13:15:58 -0700 |
commit | df2b390bba18903d62c8910e808bfb0dce7f033c (patch) | |
tree | 62831951e5c4766c03b01aeca93d89f95abdc70a | |
parent | 157c57198e893b4882d1feb98de2b0721ee408fc (diff) | |
download | glibc-df2b390bba18903d62c8910e808bfb0dce7f033c.tar.gz glibc-df2b390bba18903d62c8910e808bfb0dce7f033c.tar.xz glibc-df2b390bba18903d62c8910e808bfb0dce7f033c.zip |
Detect Intel Goldmont and Airmont processors
Updated from the model numbers of Goldmont and Airmont processors in Intel64 And IA-32 Processor Architectures Software Developer's Manual Volume 3 Revision 058. * sysdeps/x86/cpu-features.c (init_cpu_features): Detect Intel Goldmont and Airmont processors.
-rw-r--r-- | sysdeps/x86/cpu-features.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 942fec8bc8..184e0d9cb9 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -132,6 +132,14 @@ init_cpu_features (struct cpu_features *cpu_features) cpu_features->feature[index_arch_Prefer_No_VZEROUPPER] |= bit_arch_Prefer_No_VZEROUPPER; + case 0x5c: + case 0x5f: + /* Unaligned load versions are faster than SSSE3 + on Goldmont. */ + + case 0x4c: + /* Airmont is a die shrink of Silvermont. */ + case 0x37: case 0x4a: case 0x4d: |