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authorUlrich Drepper <drepper@redhat.com>2007-10-10 01:22:45 +0000
committerUlrich Drepper <drepper@redhat.com>2007-10-10 01:22:45 +0000
commit5a01ab7b838c967ba38720136a71d8b89d5b79ce (patch)
tree7418c83a84b06fcca931dca2569e5f456431220b
parent7753717472f38aa44d636ade701f3a948d275ff3 (diff)
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* sysdeps/x86_64/cacheinfo.c (init_cacheinfo): Work around problem
	with some Pentium Ds.
-rw-r--r--ChangeLog5
-rw-r--r--localedata/locales/de_DE1
-rw-r--r--sysdeps/x86_64/cacheinfo.c8
3 files changed, 13 insertions, 1 deletions
diff --git a/ChangeLog b/ChangeLog
index 4c774652b5..04615d17db 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2007-10-09  Ulrich Drepper  <drepper@redhat.com>
+
+	* sysdeps/x86_64/cacheinfo.c (init_cacheinfo): Work around problem
+	with some Pentium Ds.
+
 2007-10-08  Ulrich Drepper  <drepper@redhat.com>
 
 	* sysdeps/unix/sysv/linux/eventfd_read.c (eventfd_read): Use
diff --git a/localedata/locales/de_DE b/localedata/locales/de_DE
index 7f22b22c28..a694dc2888 100644
--- a/localedata/locales/de_DE
+++ b/localedata/locales/de_DE
@@ -120,7 +120,6 @@ day	"<U0053><U006F><U006E><U006E><U0074><U0061><U0067>";/
 	"<U0044><U006F><U006E><U006E><U0065><U0072><U0073><U0074><U0061><U0067>";/
 	"<U0046><U0072><U0065><U0069><U0074><U0061><U0067>";/
 	"<U0053><U0061><U006D><U0073><U0074><U0061><U0067>"
-week    7;19971201;4
 abmon	"<U004A><U0061><U006E>";"<U0046><U0065><U0062>";/
 	"<U004D><U00E4><U0072>";"<U0041><U0070><U0072>";/
 	"<U004D><U0061><U0069>";"<U004A><U0075><U006E>";/
diff --git a/sysdeps/x86_64/cacheinfo.c b/sysdeps/x86_64/cacheinfo.c
index 5b92bd5849..12102fea81 100644
--- a/sysdeps/x86_64/cacheinfo.c
+++ b/sysdeps/x86_64/cacheinfo.c
@@ -456,6 +456,13 @@ init_cacheinfo (void)
               asm volatile ("cpuid"
 		            : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
 		            : "0" (4), "2" (i++));
+
+	      /* There seems to be a bug in at least some Pentium Ds
+		 which sometimes fail to iterate all cache parameters.
+		 Do not loop indefinitely here, stop in this case and
+		 assume there is no such information.  */
+	      if ((eax & 0x1f) == 0)
+		goto intel_bug_no_cache_info;
 	    }
           while (((eax >> 5) & 0x7) != level);
 
@@ -463,6 +470,7 @@ init_cacheinfo (void)
 	}
       else
         {
+	intel_bug_no_cache_info:
 	  /* Assume that all logical threads share the highest cache level.  */
           asm volatile ("cpuid"
 		        : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)