diff options
author | Paul A. Clarke <pc@us.ibm.com> | 2019-03-15 19:04:24 -0400 |
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committer | Paul A. Clarke <pc@us.ibm.com> | 2019-06-06 14:11:56 -0500 |
commit | de751ebc9efa97ce0115e42bd55fa1beeb614380 (patch) | |
tree | 5dd54e292a36158dba41efd8491908f05365b3f8 | |
parent | 28dd3939221ab26c6774097e9596e30d9753f758 (diff) | |
download | glibc-de751ebc9efa97ce0115e42bd55fa1beeb614380.tar.gz glibc-de751ebc9efa97ce0115e42bd55fa1beeb614380.tar.xz glibc-de751ebc9efa97ce0115e42bd55fa1beeb614380.zip |
[powerpc] get_rounding_mode: utilize faster method to get rounding mode
Add support to use 'mffsl' instruction if compiled for POWER9 (or later). Also, mask the result to avoid bleeding unrelated bits into the result of _FPU_GET_RC(). Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
-rw-r--r-- | ChangeLog | 9 | ||||
-rw-r--r-- | sysdeps/powerpc/fpu/get-rounding-mode.h | 33 | ||||
-rw-r--r-- | sysdeps/powerpc/fpu_control.h | 29 |
3 files changed, 68 insertions, 3 deletions
diff --git a/ChangeLog b/ChangeLog index 89176cbccd..d988bc5309 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,12 @@ +2019-06-06 Paul A. Clarke <pc@us.ibm.com> + + * sysdeps/powerpc/fpu_control.h (_FPU_MASK_RC): New. + (__FPU_MFFS): New. + (__FPU_MFFSL): New. + (_FPU_GET_RC): New. + (_FPU_GETCW): Use __FPU_MFFS(). + * sysdeps/powerpc/fpu/get-rounding-mode.h: New file. + 2019-06-06 Florian Weimer <fweimer@redhat.com> * sysdeps/unix/sysv/linux/riscv/flush-icache.c: Do not use diff --git a/sysdeps/powerpc/fpu/get-rounding-mode.h b/sysdeps/powerpc/fpu/get-rounding-mode.h new file mode 100644 index 0000000000..e2fdbbbcce --- /dev/null +++ b/sysdeps/powerpc/fpu/get-rounding-mode.h @@ -0,0 +1,33 @@ +/* Determine floating-point rounding mode within libc. powerpc64 version. + Copyright (C) 2019 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#ifndef _POWERPC64_GET_ROUNDING_MODE_H +#define _POWERPC64_GET_ROUNDING_MODE_H 1 + +#include <fenv.h> +#include <fpu_control.h> + +/* Return the floating-point rounding mode. */ + +static inline int +get_rounding_mode (void) +{ + return _FPU_GET_RC (); +} + +#endif /* get-rounding-mode.h */ diff --git a/sysdeps/powerpc/fpu_control.h b/sysdeps/powerpc/fpu_control.h index e88d81640d..07ccc849d9 100644 --- a/sysdeps/powerpc/fpu_control.h +++ b/sysdeps/powerpc/fpu_control.h @@ -40,6 +40,8 @@ extern fpu_control_t __fpu_control; # define _FPU_RC_UP 0x02 # define _FPU_RC_ZERO 0x01 +# define _FPU_MASK_RC (_FPU_RC_NEAREST|_FPU_RC_DOWN|_FPU_RC_UP|_FPU_RC_ZERO) + # define _FPU_MASK_NI 0x04 /* non-ieee mode */ /* masking of interrupts */ @@ -63,15 +65,36 @@ extern fpu_control_t __fpu_control; typedef unsigned int fpu_control_t; /* Macros for accessing the hardware control word. */ +# define __FPU_MFFS() \ + ({register double __fr; \ + __asm__ ("mffs %0" : "=f" (__fr)); \ + __fr; \ + }) + # define _FPU_GETCW(cw) \ ({union { double __d; unsigned long long __ll; } __u; \ - register double __fr; \ - __asm__ ("mffs %0" : "=f" (__fr)); \ - __u.__d = __fr; \ + __u.__d = __FPU_MFFS(); \ (cw) = (fpu_control_t) __u.__ll; \ (fpu_control_t) __u.__ll; \ }) +#ifdef _ARCH_PWR9 +# define __FPU_MFFSL() \ + ({register double __fr; \ + __asm__ ("mffsl %0" : "=f" (__fr)); \ + __fr; \ + }) +#else +# define __FPU_MFFSL() __FPU_MFFS() +#endif + +# define _FPU_GET_RC() \ + ({union { double __d; unsigned long long __ll; } __u; \ + __u.__d = __FPU_MFFSL(); \ + __u.__ll &= _FPU_MASK_RC; \ + (fpu_control_t) __u.__ll; \ + }) + # define _FPU_SETCW(cw) \ { union { double __d; unsigned long long __ll; } __u; \ register double __fr; \ |