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authorAdhemerval Zanella <azanella@linux.vnet.ibm.com>2014-11-03 07:26:33 -0500
committerAdhemerval Zanella <azanella@linux.vnet.ibm.com>2014-11-03 07:26:33 -0500
commit5e4df2848d5b0cfa8bedd9ef540e85cd33ff8f3b (patch)
treef9543f0dd5ff67c958ac471a94fcdf509c031df1
parent04b76b5aa8b2d1d19066e42dd1a56a38f34e274c (diff)
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powerpc: Fix encoding of POWER8 instruction
This patch adds a binary encoding for 'mtvsrd' instruction to avoid
build failures when assembler does not support POWER8.
-rw-r--r--ChangeLog5
-rw-r--r--sysdeps/powerpc/powerpc64/power8/memset.S9
2 files changed, 13 insertions, 1 deletions
diff --git a/ChangeLog b/ChangeLog
index ddcb44341a..aabcd62cf9 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2014-11-03  Adhemerval Zanella  <azanella@linux.vnet.ibm.com>
+
+	* sysdeps/powerpc/powerpc64/power8/memset.S (MTVSRD_V1_R4): Encode
+	mtvsrd instruction in binary form.
+
 2014-11-03  Andreas Schwab  <schwab@suse.de>
 
 	[BZ #17522]
diff --git a/sysdeps/powerpc/powerpc64/power8/memset.S b/sysdeps/powerpc/powerpc64/power8/memset.S
index 191a4df0a9..cebcbdf8fb 100644
--- a/sysdeps/powerpc/powerpc64/power8/memset.S
+++ b/sysdeps/powerpc/powerpc64/power8/memset.S
@@ -17,6 +17,13 @@
    <http://www.gnu.org/licenses/>.  */
 
 #include <sysdep.h>
+#include <endian.h>
+
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+#define MTVSRD_V1_R4  .byte 0x66,0x01,0x24,0x7c     /* mtvsrd  v1,r4  */
+#else
+#define MTVSRD_V1_R4  .byte 0x7c,0x24,0x01,0x66
+#endif
 
 /* __ptr_t [r3] memset (__ptr_t s [r3], int c [r4], size_t n [r5]));
    Returns 's'.  */
@@ -142,7 +149,7 @@ L(tail_bytes):
 	   vector instruction to achieve best throughput.  */
 L(huge_vector):
 	/* Replicate set byte to quadword in VMX register.  */
-	mtvsrd	 v1,r4
+	MTVSRD_V1_R4
 	xxpermdi 32,v0,v1,0
 	vspltb	 v2,v0,15