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| author | Gabriel F. T. Gomes <gftg@linux.vnet.ibm.com> | 2016-04-12 13:11:29 -0300 |
|---|---|---|
| committer | Gabriel F. T. Gomes <gftg@linux.vnet.ibm.com> | 2016-05-04 09:14:52 -0300 |
| commit | eb3b8a4924502e508d5b353ed75f39826d2c9466 (patch) | |
| tree | e84ab024ac5a8a9f2a4c57ee121e2f7e449e6f01 | |
| parent | 5171f3079f2cc53e0548fc4967361f4d1ce9d7ea (diff) | |
| download | glibc-eb3b8a4924502e508d5b353ed75f39826d2c9466.tar.gz glibc-eb3b8a4924502e508d5b353ed75f39826d2c9466.tar.xz glibc-eb3b8a4924502e508d5b353ed75f39826d2c9466.zip | |
powerpc: Fix operand prefixes
The file sysdeps/powerpc/sysdeps.h defines aliases for condition register operands. E.g.: 'cr7' means condition register 7. On the one hand, this increases readability, as it makes it easier for readers to know whether the operand is a condition register, a general purpose register or an immediate. On the other hand, this permits that condition registers be written as if they were general purpose, and vice-versa, thus reducing the readability of the code. This commit removes some of these unintentional misuses. The changes have no effect on the final code. Checked with objdump.
| -rw-r--r-- | ChangeLog | 6 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc64/power8/strncpy.S | 8 |
2 files changed, 10 insertions, 4 deletions
diff --git a/ChangeLog b/ChangeLog index d5f56c9c9b..8fcb047815 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,9 @@ +2016-05-04 Gabriel F. T. Gomes <gftg@linux.vnet.ibm.com> + + * sysdeps/powerpc/powerpc64/power8/strncpy.S: Fix use of condition + registers specifiers where general purpose registers specifiers should + have been used. + 2016-05-04 Florian Weimer <fweimer@redhat.com> [BZ #19779] diff --git a/sysdeps/powerpc/powerpc64/power8/strncpy.S b/sysdeps/powerpc/powerpc64/power8/strncpy.S index 0bb3bd46d7..437edeb715 100644 --- a/sysdeps/powerpc/powerpc64/power8/strncpy.S +++ b/sysdeps/powerpc/powerpc64/power8/strncpy.S @@ -294,7 +294,7 @@ L(pagecross): #endif orc r9,r7,r9 /* Mask bits that are not part of the string. */ - li cr7,0 + li r7,0 cmpb r9,r9,r7 /* Check for null bytes in DWORD1. */ cmpdi cr7,r9,0 bne cr7,L(short_path_prepare_2) @@ -305,14 +305,14 @@ L(pagecross): /* For next checks we have aligned address, so we check for more three doublewords to make sure we can read 16 unaligned bytes to start the bulk copy with 16 aligned addresses. */ - ld cr7,8(r11) + ld r7,8(r11) cmpb r9,r7,r9 cmpdi cr7,r9,0 bne cr7,L(short_path_prepare_2) - addi cr7,r8,-8 + addi r7,r8,-8 cmpldi cr7,r7,8 ble cr7,L(short_path_prepare_2) - ld cr7,16(r11) + ld r7,16(r11) cmpb r9,r7,r9 cmpdi cr7,r9,0 bne cr7,L(short_path_prepare_2) |