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| author | H.J. Lu <hjl.tools@gmail.com> | 2018-07-17 16:08:35 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2018-07-17 16:08:47 -0700 |
| commit | 5efc6777ad57c2055b618e0b8b8dc1e5bc4ab29a (patch) | |
| tree | 6cec77b2b02893f95c371a11ff3a5b5f39228bbe | |
| parent | 562837c002e42f7f0a95764e3883898f05a59327 (diff) | |
| download | glibc-5efc6777ad57c2055b618e0b8b8dc1e5bc4ab29a.tar.gz glibc-5efc6777ad57c2055b618e0b8b8dc1e5bc4ab29a.tar.xz glibc-5efc6777ad57c2055b618e0b8b8dc1e5bc4ab29a.zip | |
x86-64: Add _CET_ENDBR to STRCMP_SSE42
Add _CET_ENDBR to STRCMP_SSE42, which is called indirectly, to support IBT. Reviewed-by: Carlos O'Donell <carlos@redhat.com> * sysdeps/x86_64/multiarch/strcmp-sse42.S (STRCMP_SSE42): Add _CET_ENDBR.
| -rw-r--r-- | ChangeLog | 5 | ||||
| -rw-r--r-- | sysdeps/x86_64/multiarch/strcmp-sse42.S | 1 |
2 files changed, 6 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog index 057c7b02e5..e2d560a46d 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,5 +1,10 @@ 2018-07-17 H.J. Lu <hongjiu.lu@intel.com> + * sysdeps/x86_64/multiarch/strcmp-sse42.S (STRCMP_SSE42): Add + _CET_ENDBR. + +2018-07-17 H.J. Lu <hongjiu.lu@intel.com> + * sysdeps/i386/dl-tlsdesc.S (_dl_tlsdesc_return): Add _CET_ENDBR. (_dl_tlsdesc_undefweak): Likewise. diff --git a/sysdeps/x86_64/multiarch/strcmp-sse42.S b/sysdeps/x86_64/multiarch/strcmp-sse42.S index 6fa0c2c7d2..5a0c6668a7 100644 --- a/sysdeps/x86_64/multiarch/strcmp-sse42.S +++ b/sysdeps/x86_64/multiarch/strcmp-sse42.S @@ -126,6 +126,7 @@ END (GLABEL(__strncasecmp)) STRCMP_SSE42: cfi_startproc + _CET_ENDBR CALL_MCOUNT /* |