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| author | Paul Clarke <pc@us.ibm.com> | 2017-04-11 11:19:28 -0300 |
|---|---|---|
| committer | Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com> | 2017-04-11 14:05:54 -0300 |
| commit | d031600dd2e8381e9cd2ccc20c4ce94a04f04eaf (patch) | |
| tree | 8c07faebca266325a4afff871eff013c8361298a | |
| parent | a42478b7bf10e9f890466c91280d9b24908ca980 (diff) | |
| download | glibc-d031600dd2e8381e9cd2ccc20c4ce94a04f04eaf.tar.gz glibc-d031600dd2e8381e9cd2ccc20c4ce94a04f04eaf.tar.xz glibc-d031600dd2e8381e9cd2ccc20c4ce94a04f04eaf.zip | |
Support auxilliary vector components for cache geometries.
Add support to getauxval() for new types to get L1, L2, L3 cache sizes, cache line sizes, and cache associativities. The new types for getauxval() were added in the stream for Linux kernel v4.11 in commit 98a5f361b8625c6f4841d6ba013bbf0e80d08147. * elf/elf.h (AT_L1I_CACHESIZE, AT_L1I_CACHEGEOMETRY, AT_L1D_CACHESIZE, AT_L1D_CACHEGEOMETRY, AT_L2_CACHESIZE, AT_L2_CACHEGEOMETRY, AT_L3_CACHESIZE, AT_L3_CACHEGEOMETRY): New. Add auxvec identifiers from kernel arch/powerpc/include/uapi/asm/auxvec.h.
| -rw-r--r-- | ChangeLog | 7 | ||||
| -rw-r--r-- | elf/elf.h | 12 |
2 files changed, 19 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog index 0dd3057200..5df70040e3 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,10 @@ +2017-04-11 Paul Clarke <pc@us.ibm.com> + + * elf/elf.h (AT_L1I_CACHESIZE, AT_L1I_CACHEGEOMETRY, AT_L1D_CACHESIZE, + AT_L1D_CACHEGEOMETRY, AT_L2_CACHESIZE, AT_L2_CACHEGEOMETRY, + AT_L3_CACHESIZE, AT_L3_CACHEGEOMETRY): New. Add auxvec + identifiers from kernel arch/powerpc/include/uapi/asm/auxvec.h. + 2017-04-11 Florian Weimer <fweimer@redhat.com> Zack Weinberg <zackw@panix.com> diff --git a/elf/elf.h b/elf/elf.h index 6d3b356f14..fff893d433 100644 --- a/elf/elf.h +++ b/elf/elf.h @@ -1170,6 +1170,18 @@ typedef struct #define AT_L2_CACHESHAPE 36 #define AT_L3_CACHESHAPE 37 +/* Shapes of the caches, with more room to describe them. + *GEOMETRY are comprised of cache line size in bytes in the bottom 16 bits + and the cache associativity in the next 16 bits. */ +#define AT_L1I_CACHESIZE 40 +#define AT_L1I_CACHEGEOMETRY 41 +#define AT_L1D_CACHESIZE 42 +#define AT_L1D_CACHEGEOMETRY 43 +#define AT_L2_CACHESIZE 44 +#define AT_L2_CACHEGEOMETRY 45 +#define AT_L3_CACHESIZE 46 +#define AT_L3_CACHEGEOMETRY 47 + /* Note section contents. Each entry in the note section begins with a header of a fixed form. */ |