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authorRoland McGrath <roland@gnu.org>2006-03-06 08:26:03 +0000
committerRoland McGrath <roland@gnu.org>2006-03-06 08:26:03 +0000
commit6f920003899406055edfeb403989ce9215b34068 (patch)
treea803f99632a06227e26a56c4edfb80b81a5fcdce
parent16a10468376803c5e48ac9c14cfa1a1dd2f7ec8f (diff)
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* sysdeps/unix/sysv/linux/x86_64/sysconf.c
	(handle_intel, handle_amd): Add __attribute__ ((noinline)).
	* sysdeps/unix/sysv/linux/i386/sysconf.c
	(handle_i486, handle_intel, handle_amd): Likewise.

	* sysdeps/unix/sysv/linux/i386/sysconf.c (__sysconf): Don't handle
	_SC_CPUTIME and _SC_THREAD_CPUTIME here.
	* sysdeps/unix/sysv/linux/x86_64/sysconf.c (__sysconf): Likewise.
-rw-r--r--ChangeLog11
-rw-r--r--sysdeps/unix/sysv/linux/i386/sysconf.c17
-rw-r--r--sysdeps/unix/sysv/linux/x86_64/sysconf.c10
3 files changed, 16 insertions, 22 deletions
diff --git a/ChangeLog b/ChangeLog
index 70083ec7c9..a588dd5468 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,14 @@
+2006-03-06  Roland McGrath  <roland@redhat.com>
+
+	* sysdeps/unix/sysv/linux/x86_64/sysconf.c
+	(handle_intel, handle_amd): Add __attribute__ ((noinline)).
+	* sysdeps/unix/sysv/linux/i386/sysconf.c
+	(handle_i486, handle_intel, handle_amd): Likewise.
+
+	* sysdeps/unix/sysv/linux/i386/sysconf.c (__sysconf): Don't handle
+	_SC_CPUTIME and _SC_THREAD_CPUTIME here.
+	* sysdeps/unix/sysv/linux/x86_64/sysconf.c (__sysconf): Likewise.
+
 2006-03-05  Roland McGrath  <roland@redhat.com>
 
 	* malloc/malloc.c (MALLOC_ALIGNMENT): Revert to (2 * SIZE_SZ) value.
diff --git a/sysdeps/unix/sysv/linux/i386/sysconf.c b/sysdeps/unix/sysv/linux/i386/sysconf.c
index 58f119bcda..25b9ba734e 100644
--- a/sysdeps/unix/sysv/linux/i386/sysconf.c
+++ b/sysdeps/unix/sysv/linux/i386/sysconf.c
@@ -26,7 +26,7 @@
 static long int linux_sysconf (int name);
 
 
-static long int
+static long int __attribute__ ((noinline))
 handle_i486 (int name)
 {
   /* The processor only has a unified level 1 cache of 8k.  */
@@ -202,7 +202,7 @@ intel_check_word (int name, unsigned int value, bool *has_level_2,
 }
 
 
-static long int
+static long int  __attribute__ ((noinline))
 handle_intel (int name, unsigned int maxidx)
 {
   if (maxidx < 2)
@@ -264,7 +264,7 @@ handle_intel (int name, unsigned int maxidx)
 }
 
 
-static long int
+static long int __attribute__ ((noinline))
 handle_amd (int name)
 {
   unsigned int eax;
@@ -359,17 +359,6 @@ i386_i486_test (void)
 long int
 __sysconf (int name)
 {
-  if (name == _SC_CPUTIME || name == _SC_THREAD_CPUTIME)
-    {
-#if HP_TIMING_AVAIL
-      // XXX We can add  here test for machines which cannot support a
-      // XXX usable TSC.
-      return 200112L;
-#else
-      return -1;
-#endif
-    }
-
   /* All the remainder, except the cache information, is handled in
      the generic code.  */
   if (name < _SC_LEVEL1_ICACHE_SIZE || name > _SC_LEVEL4_CACHE_LINESIZE)
diff --git a/sysdeps/unix/sysv/linux/x86_64/sysconf.c b/sysdeps/unix/sysv/linux/x86_64/sysconf.c
index 99f704e1b9..726c5e33ac 100644
--- a/sysdeps/unix/sysv/linux/x86_64/sysconf.c
+++ b/sysdeps/unix/sysv/linux/x86_64/sysconf.c
@@ -163,7 +163,7 @@ intel_check_word (int name, unsigned int value, bool *has_level_2,
 }
 
 
-static long int
+static long int __attribute__ ((noinline))
 handle_intel (int name, unsigned int maxidx)
 {
   assert (maxidx >= 2);
@@ -220,7 +220,7 @@ handle_intel (int name, unsigned int maxidx)
 }
 
 
-static long int
+static long int __attribute__ ((noinline))
 handle_amd (int name)
 {
   unsigned int eax;
@@ -293,12 +293,6 @@ handle_amd (int name)
 long int
 __sysconf (int name)
 {
-  if (name == _SC_CPUTIME || name == _SC_THREAD_CPUTIME)
-    {
-      /* XXX Test whether TSC is usable.  */
-      return 200112L;
-    }
-
   /* We only handle the cache information here (for now).  */
   if (name < _SC_LEVEL1_ICACHE_SIZE || name > _SC_LEVEL4_CACHE_LINESIZE)
     return linux_sysconf (name);