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| author | H.J. Lu <hjl.tools@gmail.com> | 2016-10-12 08:22:52 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2016-10-12 08:22:52 -0700 |
| commit | 6a824767d8948faf10d8d3a602eb4f2a59431601 (patch) | |
| tree | 6fa7dda22dd49a3d56669787de0bea6daa1f9b82 | |
| parent | 5e9d98a3d9eec0a18e6875f6e86a3886fbb7e543 (diff) | |
| download | glibc-6a824767d8948faf10d8d3a602eb4f2a59431601.tar.gz glibc-6a824767d8948faf10d8d3a602eb4f2a59431601.tar.xz glibc-6a824767d8948faf10d8d3a602eb4f2a59431601.zip | |
X86: Don't assert on older Intel CPUs [BZ #20647]
Since the maximum CPUID level of older Intel CPUs is 1, change handle_intel to return -1, instead of assert, when the maximum CPUID level is less than 2. [BZ #20647] * sysdeps/x86/cacheinfo.c (handle_intel): Return -1 if the maximum CPUID level is less than 2.
| -rw-r--r-- | ChangeLog | 6 | ||||
| -rw-r--r-- | sysdeps/x86/cacheinfo.c | 4 |
2 files changed, 9 insertions, 1 deletions
diff --git a/ChangeLog b/ChangeLog index d129219fd1..81dd89ff27 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,9 @@ +2016-10-12 H.J. Lu <hongjiu.lu@intel.com> + + [BZ #20647] + * sysdeps/x86/cacheinfo.c (handle_intel): Return -1 if the + maximum CPUID level is less than 2. + 2016-10-12 Joseph Myers <joseph@codesourcery.com> * math/bits/mathcalls.h [__GLIBC_USE (IEC_60559_BFP_EXT)] diff --git a/sysdeps/x86/cacheinfo.c b/sysdeps/x86/cacheinfo.c index cf4f64b0d8..35268e8d9a 100644 --- a/sysdeps/x86/cacheinfo.c +++ b/sysdeps/x86/cacheinfo.c @@ -259,7 +259,9 @@ intel_check_word (int name, unsigned int value, bool *has_level_2, static long int __attribute__ ((noinline)) handle_intel (int name, unsigned int maxidx) { - assert (maxidx >= 2); + /* Return -1 for older CPUs. */ + if (maxidx < 2) + return -1; /* OK, we can use the CPUID instruction to get all info about the caches. */ |