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authorH.J. Lu <hjl.tools@gmail.com>2020-10-08 08:50:44 -0700
committerH.J. Lu <hjl.tools@gmail.com>2020-10-09 11:52:30 -0700
commit428985c436f442e91e27173bccaf28f547233586 (patch)
tree74356bd972c02202489049dbcdcab1bd90d859dd
parentc712401bc641b66d9bd558884751d8979e2e0e96 (diff)
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<sys/platform/x86.h>: Add FSRCS/FSRS/FZLRM support
Add Fast Short REP CMP and SCA (FSRCS), Fast Short REP STO (FSRS) and
Fast Zero-Length REP MOV (FZLRM) support to <sys/platform/x86.h>.
-rw-r--r--manual/platform.texi9
-rw-r--r--sysdeps/x86/cpu-features.c3
-rw-r--r--sysdeps/x86/sys/platform/x86.h9
-rw-r--r--sysdeps/x86/tst-get-cpu-features.c6
4 files changed, 27 insertions, 0 deletions
diff --git a/manual/platform.texi b/manual/platform.texi
index 1e44525552..8fec2933d6 100644
--- a/manual/platform.texi
+++ b/manual/platform.texi
@@ -332,12 +332,21 @@ extensions.
 @code{FSGSBASE} -- RDFSBASE/RDGSBASE/WRFSBASE/WRGSBASE instructions.
 
 @item
+@code{FSRCS} -- Fast Short REP CMP and SCA.
+
+@item
 @code{FSRM} -- Fast Short REP MOV.
 
 @item
+@code{FSRS} -- Fast Short REP STO.
+
+@item
 @code{FXSR} -- FXSAVE and FXRSTOR instructions.
 
 @item
+@code{FZLRM} -- Fast Zero-Length REP MOV.
+
+@item
 @code{GFNI} -- GFNI instruction extensions.
 
 @item
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index b0fac22c27..286ff96771 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -93,6 +93,9 @@ update_usable (struct cpu_features *cpu_features)
   CPU_FEATURE_SET_USABLE (cpu_features, TBM);
   CPU_FEATURE_SET_USABLE (cpu_features, RDTSCP);
   CPU_FEATURE_SET_USABLE (cpu_features, WBNOINVD);
+  CPU_FEATURE_SET_USABLE (cpu_features, FZLRM);
+  CPU_FEATURE_SET_USABLE (cpu_features, FSRS);
+  CPU_FEATURE_SET_USABLE (cpu_features, FSRCS);
 
   /* Can we call xgetbv?  */
   if (CPU_FEATURES_CPU_P (cpu_features, OSXSAVE))
diff --git a/sysdeps/x86/sys/platform/x86.h b/sysdeps/x86/sys/platform/x86.h
index 394f1c41a6..3ef92b04e8 100644
--- a/sysdeps/x86/sys/platform/x86.h
+++ b/sysdeps/x86/sys/platform/x86.h
@@ -313,6 +313,9 @@ extern const struct cpu_features *__x86_get_cpu_features (unsigned int)
 /* EAX.  */
 #define bit_cpu_AVX_VNNI	(1u << 4)
 #define bit_cpu_AVX512_BF16	(1u << 5)
+#define bit_cpu_FZLRM		(1u << 10)
+#define bit_cpu_FSRS		(1u << 11)
+#define bit_cpu_FSRCS		(1u << 12)
 #define bit_cpu_HRESET		(1u << 22)
 
 /* COMMON_CPUID_INDEX_19.  */
@@ -534,6 +537,9 @@ extern const struct cpu_features *__x86_get_cpu_features (unsigned int)
 /* EAX.  */
 #define index_cpu_AVX_VNNI	COMMON_CPUID_INDEX_7_ECX_1
 #define index_cpu_AVX512_BF16	COMMON_CPUID_INDEX_7_ECX_1
+#define index_cpu_FZLRM		COMMON_CPUID_INDEX_7_ECX_1
+#define index_cpu_FSRS		COMMON_CPUID_INDEX_7_ECX_1
+#define index_cpu_FSRCS		COMMON_CPUID_INDEX_7_ECX_1
 #define index_cpu_HRESET	COMMON_CPUID_INDEX_7_ECX_1
 
 /* COMMON_CPUID_INDEX_19.  */
@@ -755,6 +761,9 @@ extern const struct cpu_features *__x86_get_cpu_features (unsigned int)
 /* EAX.  */
 #define reg_AVX_VNNI		eax
 #define reg_AVX512_BF16		eax
+#define reg_FZLRM		eax
+#define reg_FSRS		eax
+#define reg_FSRCS		eax
 #define reg_HRESET		eax
 
 /* COMMON_CPUID_INDEX_19.  */
diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c
index aacaa49045..667aa27117 100644
--- a/sysdeps/x86/tst-get-cpu-features.c
+++ b/sysdeps/x86/tst-get-cpu-features.c
@@ -223,6 +223,9 @@ do_test (void)
   CHECK_CPU_FEATURE (WBNOINVD);
   CHECK_CPU_FEATURE (AVX_VNNI);
   CHECK_CPU_FEATURE (AVX512_BF16);
+  CHECK_CPU_FEATURE (FZLRM);
+  CHECK_CPU_FEATURE (FSRS);
+  CHECK_CPU_FEATURE (FSRCS);
   CHECK_CPU_FEATURE (HRESET);
   CHECK_CPU_FEATURE (AESKLE);
   CHECK_CPU_FEATURE (WIDE_KL);
@@ -380,6 +383,9 @@ do_test (void)
   CHECK_CPU_FEATURE_USABLE (WBNOINVD);
   CHECK_CPU_FEATURE_USABLE (AVX_VNNI);
   CHECK_CPU_FEATURE_USABLE (AVX512_BF16);
+  CHECK_CPU_FEATURE_USABLE (FZLRM);
+  CHECK_CPU_FEATURE_USABLE (FSRS);
+  CHECK_CPU_FEATURE_USABLE (FSRCS);
   CHECK_CPU_FEATURE_USABLE (AESKLE);
   CHECK_CPU_FEATURE_USABLE (WIDE_KL);