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| author | Fredrik Noring <noring@nocrew.org> | 2018-11-01 14:36:48 +0000 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@linux-mips.org> | 2018-11-01 14:36:48 +0000 |
| commit | 8e3c00db16fcedea0ea47d93c2acb6d7d5ba9164 (patch) | |
| tree | b774ab536eb15aa08450ca13aeeb40960329250f | |
| parent | fc783076ec496a55c029be14617ea16a24589f55 (diff) | |
| download | glibc-8e3c00db16fcedea0ea47d93c2acb6d7d5ba9164.tar.gz glibc-8e3c00db16fcedea0ea47d93c2acb6d7d5ba9164.tar.xz glibc-8e3c00db16fcedea0ea47d93c2acb6d7d5ba9164.zip | |
MIPS: Use `.set mips2' to emulate LL/SC for the R5900 too
GAS treats the R5900 as MIPS III, with some modifications. The MIPS III designation means that the GNU C Library will try to assemble the LL and SC instructions, even though they are not implemented in the R5900. GAS will therefore produce the following errors: Error: opcode not supported on this processor: r5900 (mips3) `ll $2,0($4)' Error: opcode not supported on this processor: r5900 (mips3) `sc $6,0($4)' The MIPS II ISA override as used here enables the kernel to trap and emulate the LL and SC instructions, as required. This change has been tested by compiling the GNU C Library 2.27 with a GCC 8.2.0 cross-compiler for mipsr5900el-unknown-linux-gnu under Gentoo. * sysdeps/mips/sys/tas.h (_test_and_set): Handle the R5900 CPU with the ISA override.
| -rw-r--r-- | ChangeLog | 5 | ||||
| -rw-r--r-- | sysdeps/mips/sys/tas.h | 3 |
2 files changed, 7 insertions, 1 deletions
diff --git a/ChangeLog b/ChangeLog index 204af29aa5..67abf144c9 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,8 @@ +2018-11-01 Fredrik Noring <noring@nocrew.org> + + * sysdeps/mips/sys/tas.h (_test_and_set): Handle the R5900 CPU + with the ISA override. + 2018-10-31 Rafael Avila de Espindola <rafael@espindo.la> * sysdeps/unix/sysv/linux/sysdep-vdso.h: Simplify an #if #else diff --git a/sysdeps/mips/sys/tas.h b/sysdeps/mips/sys/tas.h index d5ed013e28..22cee94f7a 100644 --- a/sysdeps/mips/sys/tas.h +++ b/sysdeps/mips/sys/tas.h @@ -38,10 +38,11 @@ __NTH (_test_and_set (int *__p, int __v)) { int __r, __t; + /* The R5900 reports itself as MIPS III but it does not have LL/SC. */ __asm__ __volatile__ ("/* Inline test and set */\n" ".set push\n\t" -#if _MIPS_SIM == _ABIO32 && __mips < 2 +#if _MIPS_SIM == _ABIO32 && (__mips < 2 || defined (_MIPS_ARCH_R5900)) ".set mips2\n\t" #endif "sync\n\t" |